 Ville Syrjälä
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cca0502b9c
drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
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9 years ago |
 Chris Wilson
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91c8a326a1
drm/i915: Convert dev_priv->dev backpointers to dev_priv->drm
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9 years ago |
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Chris Wilson
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fac5e23e3c
drm/i915: Mass convert dev->dev_private to to_i915(dev)
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9 years ago |
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Chris Wilson
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27bf23a911
drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
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9 years ago |
 Imre Deak
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0b786e41c7
drm/i915/bxt: Avoid early timeout during PLL enable
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9 years ago |
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Ville Syrjälä
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78108b7c0a
drm/i915: Use crtc->name in debug messages
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9 years ago |
 Ander Conselvan de Oliveira
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bb14316551
drm/i915: Fix NULL pointer deference when out of PLLs in IVB
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9 years ago |
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Ville Syrjälä
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9f7eb31af2
drm/i915: Unify SKL cdclk init paths
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9 years ago |
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Ville Syrjälä
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b204535204
drm/i915: Keep track of preferred cdclk vco frequency on SKL
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9 years ago |
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Ville Syrjälä
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ea61791e59
drm/i915: Actually read out DPLL0 vco on skl from hardware
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9 years ago |
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Ville Syrjälä
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14d41b3b0e
drm/i915: Move the SKL DPLL0 VCO computation into intel_dp_compute_config()
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9 years ago |
 Clint Taylor
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c89e39f327
drm/i915/skl: SKL CDCLK change on modeset tracking VCO
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9 years ago |
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Ander Conselvan de Oliveira
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9e2c84751e
drm/i915: Remove intel_clock_t typedef
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9 years ago |
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Ville Syrjälä
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d5aab9d401
drm/i915: s/DPPL/DPLL/ for SKL DPLLs
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9 years ago |
 Dongwon Kim
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da6110bcbc
drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variations
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9 years ago |
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Imre Deak
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d7d7c9ee69
drm/i915/bxt: Don't toggle power well 1 on-demand
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9 years ago |
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Imre Deak
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c6c4696fa5
drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpers
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9 years ago |
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Dongwon Kim
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25a5670533
drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
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9 years ago |
 Joonas Lahtinen
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2d1fe07340
drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)
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9 years ago |
 Maarten Lankhorst
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fbf6d8798f
drm/i915: Add locking to pll updates, v3.
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9 years ago |
 Jani Nikula
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52e2abb30c
drm/i915: fix sparse warning for using false as NULL
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9 years ago |
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Maarten Lankhorst
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15e7ec29ce
drm/i915: Move pll power state to crtc power domains.
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9 years ago |
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Maarten Lankhorst
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a1475e775e
drm/i915: Perform dpll commit first, v2.
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9 years ago |
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Maarten Lankhorst
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2dd66ebde4
drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.
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9 years ago |
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Imre Deak
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08250c4ba6
drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
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9 years ago |
|
Ander Conselvan de Oliveira
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a3c988ea06
drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code
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9 years ago |
|
Ander Conselvan de Oliveira
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9d16da65bf
drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface
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9 years ago |
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Ander Conselvan de Oliveira
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34177c249a
drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.c
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9 years ago |
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Ander Conselvan de Oliveira
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304b65cbdc
drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c
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9 years ago |
|
Ander Conselvan de Oliveira
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daedf20a4f
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
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9 years ago |
