 Tvrtko Ursulin
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66478475b5
drm/i915: Assorted INTEL_INFO(dev) cleanups
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8 years ago |
 Ander Conselvan de Oliveira
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ed37892e6d
drm/i915: Address broxton phy registers based on phy and channel number
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9 years ago |
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Tvrtko Ursulin
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e2d214ae2b
drm/i915: Make IS_BROXTON only take dev_priv
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9 years ago |
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Tvrtko Ursulin
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0853723b89
drm/i915: Make IS_KABYLAKE only take dev_priv
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9 years ago |
|
Tvrtko Ursulin
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6e266956a5
drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv
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9 years ago |
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Tvrtko Ursulin
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4f8036a281
drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv
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9 years ago |
 Imre Deak
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a04139c4cf
drm/i915/bxt: Fix HDMI DPLL configuration
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9 years ago |
 Jani Nikula
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bcbfcc37cd
drm/i915: do not use 'false' as a NULL pointer
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9 years ago |
 Jim Bride
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f169660ed4
drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT
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9 years ago |
 Manasi Navare
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81b9fd8fc6
drm/i915: Split hsw_get_dpll()
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9 years ago |
|
Jim Bride
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9a4edadacc
drm/i915: Split skl_get_dpll()
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9 years ago |
 Durgadoss R
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a277ca7dc0
drm/i915: Split bxt_ddi_pll_select()
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9 years ago |
|
Ander Conselvan de Oliveira
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c856052abc
drm/i915: Remove ddi_pll_sel from intel_crtc_state
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9 years ago |
 Maarten Lankhorst
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a79e8cc792
drm/i915: handle DP_MST correctly in bxt_get_dpll
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9 years ago |
 Ville Syrjälä
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cca0502b9c
drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
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9 years ago |
 Chris Wilson
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91c8a326a1
drm/i915: Convert dev_priv->dev backpointers to dev_priv->drm
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9 years ago |
|
Chris Wilson
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fac5e23e3c
drm/i915: Mass convert dev->dev_private to to_i915(dev)
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9 years ago |
|
Chris Wilson
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27bf23a911
drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
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9 years ago |
|
Imre Deak
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0b786e41c7
drm/i915/bxt: Avoid early timeout during PLL enable
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9 years ago |
|
Ville Syrjälä
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78108b7c0a
drm/i915: Use crtc->name in debug messages
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9 years ago |
|
Ander Conselvan de Oliveira
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bb14316551
drm/i915: Fix NULL pointer deference when out of PLLs in IVB
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9 years ago |
|
Ville Syrjälä
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9f7eb31af2
drm/i915: Unify SKL cdclk init paths
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9 years ago |
|
Ville Syrjälä
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b204535204
drm/i915: Keep track of preferred cdclk vco frequency on SKL
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9 years ago |
|
Ville Syrjälä
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ea61791e59
drm/i915: Actually read out DPLL0 vco on skl from hardware
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9 years ago |
|
Ville Syrjälä
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14d41b3b0e
drm/i915: Move the SKL DPLL0 VCO computation into intel_dp_compute_config()
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9 years ago |
 Clint Taylor
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c89e39f327
drm/i915/skl: SKL CDCLK change on modeset tracking VCO
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9 years ago |
|
Ander Conselvan de Oliveira
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9e2c84751e
drm/i915: Remove intel_clock_t typedef
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9 years ago |
|
Ville Syrjälä
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d5aab9d401
drm/i915: s/DPPL/DPLL/ for SKL DPLLs
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9 years ago |
 Dongwon Kim
|
da6110bcbc
drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variations
|
9 years ago |
|
Imre Deak
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d7d7c9ee69
drm/i915/bxt: Don't toggle power well 1 on-demand
|
9 years ago |
