 Lucas Stach
|
c8df6ac945
PCI: designware: Remove open-coded bitmap operations
|
11 years ago |
|
Lucas Stach
|
91f8ae823f
PCI: designware: Setup and clear exactly one MSI at a time
|
11 years ago |
 Minghuan Lian
|
24832b4de3
PCI: designware: Add get_msi_data() to pcie_host_ops
|
11 years ago |
|
Minghuan Lian
|
450e344e42
PCI: designware: Rename get_msi_data() to get_msi_addr()
|
11 years ago |
|
Minghuan Lian
|
0c61ea77cc
PCI: designware: Fix IO resource end address calculation
|
11 years ago |
|
Minghuan Lian
|
ec98e9ab6f
PCI: designware: Fix configuration base address when using 'reg'
|
11 years ago |
 Fabio Estevam
|
9f0dbe087b
PCI: designware: Use NULL instead of false
|
11 years ago |
 Pratyush Anand
|
adf70fc087
PCI: designware: Fold struct pcie_port_info into struct pcie_port
|
11 years ago |
|
Lucas Stach
|
84a263f394
PCI: designware: Check private_data validity in single place
|
11 years ago |
|
Lucas Stach
|
8ddebc4103
PCI: designware: Remove pci_assign_unassigned_resources() from dw_pcie_host_init()
|
11 years ago |
|
Lucas Stach
|
92483df2ba
PCI: designware: Use pci_create_root_bus() instead of pci_scan_root_bus()
|
11 years ago |
|
Lucas Stach
|
4f2ebe0059
PCI: designware: Parse bus-range property from devicetree
|
11 years ago |
 Murali Karicheri
|
b14a3d1784
PCI: designware: Add support for v3.65 hardware
|
11 years ago |
|
Murali Karicheri
|
2f37c5a81c
PCI: designware: Add MSI-related pcie_host_ops for v3.65 hardware
|
11 years ago |
|
Murali Karicheri
|
a1c0ae9c24
PCI: designware: Add config access-related pcie_host_ops for v3.65 hardware
|
11 years ago |
 Kishon Vijay Abraham I
|
f4c55c5a3f
PCI: designware: Program ATU with untranslated address
|
11 years ago |
|
Kishon Vijay Abraham I
|
4dd964df36
PCI: designware: Look for configuration space in 'reg', not 'ranges'
|
11 years ago |
 Bjorn Helgaas
|
843a85ced9
Merge branches 'pci/host-designware', 'pci/host-imx6', 'pci/host-mvebu' and 'pci/host-tegra' into next
|
11 years ago |
|
Lucas Stach
|
7f4f16eef5
PCI: designware: Make MSI ISR shared IRQ aware
|
11 years ago |
 Andrew Murray
|
11c6fbd8d9
PCI: designware: Remove unnecessary use of 'conf_lock' spinlock
|
11 years ago |
|
Lucas Stach
|
804f57b1a6
PCI: designware: Use new OF interrupt mapping when possible
|
11 years ago |
 Mohit Kumar
|
a19f88bdd1
PCI: designware: Fix iATU programming for cfg1, io and mem viewport
|
11 years ago |
|
Mohit Kumar
|
66c5c34bf8
PCI: designware: Fix comment for setting number of lanes
|
11 years ago |
 Linus Torvalds
|
4b1779c2cf
Merge tag 'pci-v3.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
|
11 years ago |
 Thomas Gleixner
|
f7bfca6db6
pci: pcie-designware: Remove irq_desc abuse
|
11 years ago |
|
Mohit Kumar
|
dbffdd6862
PCI: designware: Fix RC BAR to be single 64-bit non-prefetchable memory BAR
|
11 years ago |
 Jingoo Han
|
58275f2f0a
PCI: designware: Fix indent code style
|
11 years ago |
|
Pratyush Anand
|
fce8591f73
PCI: designware: Fix I/O transfers by using CPU (not realio) address
|
11 years ago |
|
Pratyush Anand
|
a01ef59e13
PCI: designware: Add dw_pcie prefix before cfg_read/write
|
11 years ago |
 Harro Haan
|
ca1658921b
PCI: designware: Fix missing MSI IRQs
|
11 years ago |
