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@@ -418,6 +418,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
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+ global_io_offset);
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pp->config.io_size = resource_size(&pp->io);
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pp->config.io_bus_addr = range.pci_addr;
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+ pp->io_base = range.cpu_addr;
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}
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if (restype == IORESOURCE_MEM) {
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of_pci_range_to_resource(&range, np, &pp->mem);
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@@ -443,7 +444,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
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pp->cfg0_base = pp->cfg.start;
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pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
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- pp->io_base = pp->io.start;
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pp->mem_base = pp->mem.start;
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pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
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@@ -613,7 +613,6 @@ static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
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return ret;
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}
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-
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static int dw_pcie_valid_config(struct pcie_port *pp,
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struct pci_bus *bus, int dev)
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{
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@@ -707,7 +706,7 @@ static int dw_pcie_setup(int nr, struct pci_sys_data *sys)
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if (global_io_offset < SZ_1M && pp->config.io_size > 0) {
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sys->io_offset = global_io_offset - pp->config.io_bus_addr;
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- pci_ioremap_io(sys->io_offset, pp->io.start);
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+ pci_ioremap_io(global_io_offset, pp->io_base);
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global_io_offset += SZ_64K;
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pci_add_resource_offset(&sys->resources, &pp->io,
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sys->io_offset);
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