 Dave Airlie
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c693099294
Revert "drm/i915: reverse dp link param selection, prefer fast over wide again"
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11 vuotta sitten |
 Clint Taylor
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01527b3127
drm/i915/vlv: T12 eDP panel timing enforcement during reboot
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11 vuotta sitten |
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Dave Airlie
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8d4ad9d4bb
Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next
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11 vuotta sitten |
 Rob Clark
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51fd371bba
drm: convert crtc and connection_mutex to ww_mutex (v5)
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11 vuotta sitten |
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Dave Airlie
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4f71d0cb76
drm/dp: add a hw mutex around the transfer functions. (v2)
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11 vuotta sitten |
 Daniel Vetter
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6e9f798d91
drm: Split connection_mutex out of mode_config.mutex (v3)
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11 vuotta sitten |
 Jani Nikula
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8e329a039b
drm/i915: replace drm_get_encoder_name() with direct name field use
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11 vuotta sitten |
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Jani Nikula
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c23cc4178d
drm/i915: replace drm_get_connector_name() with direct name field use
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11 vuotta sitten |
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Daniel Vetter
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bc76e320f2
drm/i915: Drop now misleading DDI comment from dp_link_down
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11 vuotta sitten |
 Ville Syrjälä
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1966e59ec1
drm/i915/chv: Use RMW to toggle swing calc init
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11 vuotta sitten |
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Ville Syrjälä
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f72df8dbe2
drm/i915/chv: Don't do group access reads from TX lanes either
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11 vuotta sitten |
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Ville Syrjälä
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97fd4d5c81
drm/i915/chv: Don't use PCS group access reads
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11 vuotta sitten |
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Ville Syrjälä
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d2152b2524
drm/i915/chv: Set soft reset override bit for data lane resets
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11 vuotta sitten |
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Ville Syrjälä
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580d3811f4
drm/i915/chv: Reset data lanes in encoder .post_disable() hook
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11 vuotta sitten |
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Ville Syrjälä
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949c1d43d6
drm/i915/chv: Move data lane deassert to encoder pre_enable
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11 vuotta sitten |
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Ville Syrjälä
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71485e0aa8
drm/i915/chv: Fix PORT_TO_PIPE for CHV
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11 vuotta sitten |
|
Ville Syrjälä
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882ec3846e
drm/i915/chv: Configure crtc_mask correctly for CHV
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11 vuotta sitten |
|
Daniel Vetter
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8ac33ed3dc
drm/i915/dp: Remove ->mode_set callback
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11 vuotta sitten |
|
Daniel Vetter
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d41f1efb32
drm/i915/dp: Move port A pll setup to g4x_pre_enable_dp
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11 vuotta sitten |
|
Daniel Vetter
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9ed109a7b4
drm/i915: Track has_audio in the pipe config
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11 vuotta sitten |
|
Jani Nikula
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f4cdbc2144
drm/i915/dp: force eDP lane count to max available lanes on BDW
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11 vuotta sitten |
 Chon Ming Lee
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44f37d1f52
drm/i915/chv: Pipe select change for DP and HDMI
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11 vuotta sitten |
|
Chon Ming Lee
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e4a1d8467d
drm/i915/chv: Add phy supports for Cherryview
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11 vuotta sitten |
|
Chon Ming Lee
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ef9348c860
drm/i915/chv: find the best divisor for the target clock v4
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11 vuotta sitten |
|
Jani Nikula
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56071a2076
drm/i915: use lane count and link rate from VBT as minimums for eDP
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11 vuotta sitten |
 Paulo Zanoni
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eeb6324dd6
drm/i915: consider the source max DP lane count too
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11 vuotta sitten |
 Imre Deak
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bb4932c4f1
drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on
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11 vuotta sitten |
 Jesse Barnes
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93c9c19b3d
drm/i915: remove unexplained vblank wait in the DP off code
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11 vuotta sitten |
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Dave Airlie
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885ac04ab3
Merge tag 'drm-intel-next-2014-04-16' of git://anongit.freedesktop.org/drm-intel into drm-next
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11 vuotta sitten |
|
Paulo Zanoni
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9bbfd20abe
drm/i915: don't try DP_LINK_BW_5_4 on HSW ULX
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11 vuotta sitten |
