Merge branch 'graphics-ti-linux-4.19.y' of git://git.ti.com/graphics/graphics-kernel-feature-tree into ti-linux-4.19.y

TI-Feature: graphics
TI-Tree: git://git.ti.com/graphics/graphics-kernel-feature-tree.git
TI-Branch: graphics-ti-linux-4.19.y

* 'graphics-ti-linux-4.19.y' of git://git.ti.com/graphics/graphics-kernel-feature-tree:
  ti_config_fragments: enable DRM legacy mode
  ARM64: dts: am654x-base-board: enable SGX node
  ARM64: dts: AM654: add device tree entry for SGX
  ARM: OMAP2+: Use pdata-quirks for sgx deassert hardreset
  ARM: dts: am335x: enable SGX node
  ARM: dts: am33xx: add device tree entry for SGX
  ARM: dts: am43x-epos-evm: enable DT node for gpu
  ARM: dts: am437x: enable SGX node
  ARM: dts: am437x: add device tree entry for SGX
  ARM: dts: AM57x: enable SGX node
  ARM: dts: DRA7xx: enable SGX node
  ARM: dts: DRA7xx: add device tree entry for SGX
  ARM: DRA7: Add gpu hwmod data
  dt-bindings: gpu: add binding for TI SGX driver

Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>

Documentation/devicetree/bindings/gpu/ti-sgx.txt

@@ -0,0 +1,45 @@
+Texas Instruments SGX 3D Graphics Processing Unit
+
+SGX is a 3D Graphics Processing Unit from Imagination Technologies. SGX is
+codename for 5th generation / Series 5 of PowerVR chipset family. This binding
+describes PowerVR SGX GPU integrated in Texas Instrument SoCs.
+
+Required properties:
+ - compatible : value should take the following format:
+	"ti,<soc>-<gpuversion>", "img,<gpuversion>"
+
+   accepted values:
+	(a) "ti,am3352-sgx530", "img,sgx530" for TI AM33x
+	(b) "ti,am4376-sgx530", "img,sgx530" for TI AM43x
+	(c) "ti,dra7-sgx544", "img,sgx544" for TI DRA7xx / AM57x
+	(d) "ti,am654-sgx544", "img,sgx544" for TI AM654
+ - reg: base address and length of the SGX registers
+ - interrupts : SGX interrupt number
+ - ti,hwmods: Name of the hwmod associated with the SGX for non-AM654 devices
+ - power-domains: Power domain parameters of the SGX for AM654 devices
+ - clocks : from SoC clock binding
+
+Optional properties:
+ - reg-names : names of registers listed in reg property in same order
+ - clock-names : names of clocks listed in clocks property in the same order
+
+Examples:
+	sgx@56000000 {
+		compatible = "ti,dra7-sgx544", "img,sgx544";
+		reg = <0x56000000 0x10000>;
+		reg-names = "gpu_ocp_base";
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		ti,hwmods = "gpu";
+		clocks = <&l3_iclk_div>, <&gpu_core_gclk_mux>,
+			 <&gpu_hyd_gclk_mux>;
+		clock-names = "iclk", "fclk1", "fclk2";
+	};
+
+	gpu@7000000 {
+		compatible = "ti,am654-sgx544", "img,sgx544";
+		reg = <0x0 0x7000000 0x0 0x10000>;
+		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 65>;
+		clocks = <&k3_clks 65 0>, <&k3_clks 65 1>, <&k3_clks 65 2>, <&k3_clks 65 3>;
+		clock-names = "mem_clk", "hyd_clk", "sgx_clk", "sys_clk";
+	};

arch/arm/boot/dts/am335x-bone.dts

@@ -24,3 +24,7 @@
 &mmc1 {
 	vmmc-supply = <&ldo3_reg>;
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am335x-boneblack.dts

@@ -11,6 +11,10 @@
 #include "am335x-bone-common.dtsi"
 #include "am335x-boneblack-common.dtsi"
 
+&sgx {
+	status = "okay";
+};
+
 / {
 	model = "TI AM335x BeagleBone Black";
 	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";

arch/arm/boot/dts/am335x-evm.dts

@@ -804,3 +804,7 @@
 &wkup_m3_ipc {
 	ti,scale-data-fw = "am335x-evm-scale-data.bin";
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am335x-evmsk.dts

@@ -741,6 +741,10 @@
 	blue-and-red-wiring = "crossed";
 };
 
+&sgx {
+	status = "okay";
+};
+
 &rtc {
 	clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
 	clock-names = "ext-clk", "int-clk";

arch/arm/boot/dts/am335x-lxm.dts

@@ -364,3 +364,6 @@
 	status = "okay";
 };
 
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am335x-nano.dts

@@ -467,3 +467,7 @@
 		};
 	};
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am335x-pepper.dts

@@ -654,3 +654,7 @@
 		>;
 	};
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am33xx.dtsi

@@ -1052,6 +1052,16 @@
 			reg = <0x48310000 0x2000>;
 			interrupts = <111>;
 		};
+
+		sgx: sgx@56000000 {
+			compatible = "ti,am3352-sgx530", "img,sgx530";
+			ti,hwmods = "gfx";
+			reg = <0x56000000 0x10000>;
+			interrupts = <37>;
+			clocks = <&gfx_fck_div_ck>;
+			clock-names = "fclk";
+			status = "disabled";
+		};
 	};
 };
 

arch/arm/boot/dts/am4372.dtsi

@@ -1225,6 +1225,16 @@
 			ti,hwmods = "vpfe1";
 			status = "disabled";
 		};
+
+		sgx: sgx@56000000 {
+			compatible = "ti,am4376-sgx530", "img,sgx530";
+			ti,hwmods = "gfx";
+			reg = <0x56000000 0x10000>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gfx_fck_div_ck>;
+			clock-names = "fclk";
+			status = "disabled";
+		};
 	};
 };
 

arch/arm/boot/dts/am437x-gp-evm.dts

@@ -1144,3 +1144,7 @@
 	ti,set-io-isolation;
 	ti,scale-data-fw = "am43x-evm-scale-data.bin";
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am437x-idk-evm.dts

@@ -533,3 +533,7 @@
 		opp-suspend;
 	};
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am437x-sk-evm.dts

@@ -909,3 +909,7 @@
 &wkup_m3_ipc {
 	ti,scale-data-fw = "am43x-evm-scale-data.bin";
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am43x-epos-evm.dts

@@ -1020,3 +1020,7 @@
 &wkup_m3_ipc {
 	ti,scale-data-fw = "am43x-evm-scale-data.bin";
 };
+
+&sgx {
+	status = "okay";
+};

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi

@@ -530,6 +530,10 @@
        };
 };
 
+&gpu {
+	status = "ok";
+};
+
 &dss {
 	status = "ok";
 

arch/arm/boot/dts/am57xx-idk-common.dtsi

@@ -507,3 +507,7 @@
 &cpu0 {
 	vdd-supply = <&smps12_reg>;
 };
+
+&gpu {
+	status = "ok";
+};

arch/arm/boot/dts/dra7-evm-common.dtsi

@@ -112,6 +112,10 @@
 	};
 };
 
+&gpu {
+	status = "ok";
+};
+
 &i2c3 {
 	status = "okay";
 	clock-frequency = <400000>;

arch/arm/boot/dts/dra7.dtsi

@@ -1913,6 +1913,18 @@
 			status = "disabled";
 		};
 
+		gpu: gpu@56000000 {
+			compatible = "ti,dra7-sgx544", "img,sgx544";
+			reg = <0x56000000 0x10000>;
+			reg-names = "gpu_ocp_base";
+			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+			ti,hwmods = "gpu";
+			clocks = <&l3_iclk_div>, <&gpu_core_gclk_mux>,
+				<&gpu_hyd_gclk_mux>;
+			clock-names = "iclk", "fclk1", "fclk2";
+			status = "disabled";
+		};
+
 		dss: dss@58000000 {
 			compatible = "ti,dra7-dss";
 			/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */

arch/arm/boot/dts/dra72-evm-common.dtsi

@@ -571,6 +571,10 @@
 	};
 };
 
+&gpu {
+	status = "ok";
+};
+
 &dss {
 	status = "ok";
 };

arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1182,6 +1182,40 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
 	},
 };
 
+/*
+ * 'gpu' class
+ * 3d graphics accelerator
+ */
+
+static struct omap_hwmod_class_sysconfig dra7xx_gpu_sysc = {
+	.rev_offs       = 0xfe00,
+	.sysc_offs      = 0xfe10,
+	.sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+	.idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+	.sysc_fields    = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class dra7xx_gpu_hwmod_class = {
+	.name   = "gpu",
+	.sysc   = &dra7xx_gpu_sysc,
+};
+
+static struct omap_hwmod dra7xx_gpu_hwmod = {
+	.name           = "gpu",
+	.class          = &dra7xx_gpu_hwmod_class,
+	.clkdm_name     = "gpu_clkdm",
+	.main_clk       = "gpu_core_gclk_mux",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_GPU_GPU_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_GPU_GPU_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
 /*
  * 'hdq1w' class
  *
@@ -3339,6 +3373,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_1 -> gpu */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpu = {
+	.master         = &dra7xx_l3_main_1_hwmod,
+	.slave          = &dra7xx_gpu_hwmod,
+	.clk            = "l3_iclk_div",
+	.user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per1 -> hdq1w */
 static struct omap_hwmod_ocp_if dra7xx_l4_per1__hdq1w = {
 	.master		= &dra7xx_l4_per1_hwmod,
@@ -4077,6 +4119,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per1__gpio7,
 	&dra7xx_l4_per1__gpio8,
 	&dra7xx_l3_main_1__gpmc,
+	&dra7xx_l3_main_1__gpu,
 	&dra7xx_l4_per1__hdq1w,
 	&dra7xx_l4_per1__i2c1,
 	&dra7xx_l4_per1__i2c2,

arch/arm/mach-omap2/pdata-quirks.c

@@ -27,6 +27,7 @@
 #include <linux/platform_data/ti-sysc.h>
 #include <linux/platform_data/wkup_m3.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
+#include <linux/platform_data/sgx-omap.h>
 
 #include "common.h"
 #include "common-board-devices.h"
@@ -46,6 +47,14 @@ struct pdata_init {
 static struct of_dev_auxdata omap_auxdata_lookup[];
 static struct twl4030_gpio_platform_data twl_gpio_auxdata;
 
+#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
+static struct gfx_sgx_platform_data sgx_pdata = {
+	.reset_name = "gfx",
+	.assert_reset = omap_device_assert_hardreset,
+	.deassert_reset = omap_device_deassert_hardreset,
+};
+#endif
+
 #ifdef CONFIG_MACH_NOKIA_N8X0
 static void __init omap2420_n8x0_legacy_init(void)
 {
@@ -568,10 +577,14 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
 #ifdef CONFIG_SOC_AM33XX
 	OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
 		       &wkup_m3_data),
+	OF_DEV_AUXDATA("ti,am3352-sgx530", 0x56000000, "56000000.sgx",
+		       &sgx_pdata),
 #endif
 #ifdef CONFIG_SOC_AM43XX
 	OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
 		       &wkup_m3_data),
+	OF_DEV_AUXDATA("ti,am4376-sgx530", 0x56000000, "56000000.sgx",
+		       &sgx_pdata),
 #endif
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
 	OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

@@ -445,6 +445,16 @@
 		status = "disabled";
 	};
 
+	gpu: gpu@7000000 {
+		compatible = "ti,am654-sgx544", "img,sgx544";
+		reg = <0x0 0x7000000 0x0 0x10000>;
+		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 65>;
+		clocks = <&k3_clks 65 0>, <&k3_clks 65 1>, <&k3_clks 65 2>, <&k3_clks 65 3>;
+		clock-names = "mem_clk", "hyd_clk", "sgx_clk", "sys_clk";
+		status = "disabled";
+	};
+
 	hwspinlock: spinlock@30e00000 {
 		compatible = "ti,am654-hwspinlock";
 		reg = <0x00 0x30e00000 0x00 0x1000>;

arch/arm64/boot/dts/ti/k3-am654-base-board.dts

@@ -246,3 +246,7 @@
 	non-removable;
 	ti,driver-strength-ohm = <50>;
 };
+
+&gpu {
+	status = "okay";
+};

include/linux/platform_data/sgx-omap.h

@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * SGX Graphics Driver Platform Data
+ *
+ * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
+ *	Darren Etheridge <detheridge@ti.com>
+ *
+ */
+
+#ifndef __SGX_OMAP_H__
+#define __SGX_OMAP_H__
+
+#include <linux/platform_device.h>
+
+struct gfx_sgx_platform_data {
+	const char *reset_name;
+
+	int (*assert_reset)(struct platform_device *pdev, const char *name);
+	int (*deassert_reset)(struct platform_device *pdev, const char *name);
+};
+
+#endif

ti_config_fragments/audio_display.cfg

@@ -27,6 +27,10 @@ CONFIG_DRM_TI_TFP410=y
 CONFIG_DRM_TOSHIBA_TC358767=y
 CONFIG_DRM_PANEL_SIMPLE=y
 
+# SGX driver needs legacy support
+CONFIG_DRM_LEGACY=y
+CONFIG_DRM_VM=y
+
 # tilcdc
 
 CONFIG_DRM_I2C_NXP_TDA998X=y