am57xx-idk-common.dtsi 11 KB

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  1. /*
  2. * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include "am57xx-industrial-grade.dtsi"
  9. / {
  10. aliases {
  11. rtc0 = &tps659038_rtc;
  12. rtc1 = &rtc;
  13. };
  14. chosen {
  15. stdout-path = &uart3;
  16. };
  17. vmain: fixedregulator-vmain {
  18. compatible = "regulator-fixed";
  19. regulator-name = "VMAIN";
  20. regulator-min-microvolt = <5000000>;
  21. regulator-max-microvolt = <5000000>;
  22. regulator-always-on;
  23. regulator-boot-on;
  24. };
  25. v3_3d: fixedregulator-v3_3d {
  26. compatible = "regulator-fixed";
  27. regulator-name = "V3_3D";
  28. vin-supply = <&smps9_reg>;
  29. regulator-min-microvolt = <3300000>;
  30. regulator-max-microvolt = <3300000>;
  31. regulator-always-on;
  32. regulator-boot-on;
  33. };
  34. vtt_fixed: fixedregulator-vtt {
  35. /* TPS51200 */
  36. compatible = "regulator-fixed";
  37. regulator-name = "vtt_fixed";
  38. vin-supply = <&v3_3d>;
  39. regulator-min-microvolt = <3300000>;
  40. regulator-max-microvolt = <3300000>;
  41. regulator-always-on;
  42. regulator-boot-on;
  43. };
  44. src_clk_x1: src_clk_x1 {
  45. #clock-cells = <0>;
  46. compatible = "fixed-clock";
  47. clock-frequency = <20000000>;
  48. };
  49. leds-iio {
  50. status = "disabled";
  51. compatible = "gpio-leds";
  52. led-out0 {
  53. label = "out0";
  54. gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
  55. default-state = "off";
  56. };
  57. led-out1 {
  58. label = "out1";
  59. gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
  60. default-state = "off";
  61. };
  62. led-out2 {
  63. label = "out2";
  64. gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
  65. default-state = "off";
  66. };
  67. led-out3 {
  68. label = "out3";
  69. gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
  70. default-state = "off";
  71. };
  72. led-out4 {
  73. label = "out4";
  74. gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
  75. default-state = "off";
  76. };
  77. led-out5 {
  78. label = "out5";
  79. gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
  80. default-state = "off";
  81. };
  82. led-out6 {
  83. label = "out6";
  84. gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
  85. default-state = "off";
  86. };
  87. led-out7 {
  88. label = "out7";
  89. gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
  90. default-state = "off";
  91. };
  92. };
  93. };
  94. &dra7_pmx_core {
  95. dcan1_pins_default: dcan1_pins_default {
  96. pinctrl-single,pins = <
  97. DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
  98. DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
  99. >;
  100. };
  101. dcan1_pins_sleep: dcan1_pins_sleep {
  102. pinctrl-single,pins = <
  103. DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
  104. DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
  105. >;
  106. };
  107. };
  108. &i2c1 {
  109. status = "okay";
  110. clock-frequency = <400000>;
  111. tps659038: tps659038@58 {
  112. compatible = "ti,tps659038";
  113. reg = <0x58>;
  114. interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
  115. &dra7_pmx_core 0x418>;
  116. #interrupt-cells = <2>;
  117. interrupt-controller;
  118. ti,system-power-controller;
  119. ti,palmas-override-powerhold;
  120. tps659038_pmic {
  121. compatible = "ti,tps659038-pmic";
  122. smps12-in-supply = <&vmain>;
  123. smps3-in-supply = <&vmain>;
  124. smps45-in-supply = <&vmain>;
  125. smps6-in-supply = <&vmain>;
  126. smps7-in-supply = <&vmain>;
  127. smps8-in-supply = <&vmain>;
  128. smps9-in-supply = <&vmain>;
  129. ldo1-in-supply = <&vmain>;
  130. ldo2-in-supply = <&vmain>;
  131. ldo3-in-supply = <&vmain>;
  132. ldo4-in-supply = <&vmain>;
  133. ldo9-in-supply = <&vmain>;
  134. ldoln-in-supply = <&vmain>;
  135. ldousb-in-supply = <&vmain>;
  136. ldortc-in-supply = <&vmain>;
  137. regulators {
  138. smps12_reg: smps12 {
  139. /* VDD_MPU */
  140. regulator-name = "smps12";
  141. regulator-min-microvolt = <850000>;
  142. regulator-max-microvolt = <1250000>;
  143. regulator-always-on;
  144. regulator-boot-on;
  145. };
  146. smps3_reg: smps3 {
  147. /* VDD_DDR EMIF1 EMIF2 */
  148. regulator-name = "smps3";
  149. regulator-min-microvolt = <1350000>;
  150. regulator-max-microvolt = <1350000>;
  151. regulator-always-on;
  152. regulator-boot-on;
  153. };
  154. smps45_reg: smps45 {
  155. /* VDD_DSPEVE on AM572 */
  156. /* VDD_IVA + VDD_DSP on AM571 */
  157. regulator-name = "smps45";
  158. regulator-min-microvolt = <850000>;
  159. regulator-max-microvolt = <1250000>;
  160. regulator-always-on;
  161. regulator-boot-on;
  162. };
  163. smps6_reg: smps6 {
  164. /* VDD_GPU */
  165. regulator-name = "smps6";
  166. regulator-min-microvolt = <850000>;
  167. regulator-max-microvolt = <1250000>;
  168. regulator-always-on;
  169. regulator-boot-on;
  170. };
  171. smps7_reg: smps7 {
  172. /* VDD_CORE */
  173. regulator-name = "smps7";
  174. regulator-min-microvolt = <850000>;
  175. regulator-max-microvolt = <1150000>;
  176. regulator-always-on;
  177. regulator-boot-on;
  178. };
  179. smps8_reg: smps8 {
  180. /* 5728 - VDD_IVAHD */
  181. /* 5718 - N.C. test point */
  182. regulator-name = "smps8";
  183. };
  184. smps9_reg: smps9 {
  185. /* VDD_3_3D */
  186. regulator-name = "smps9";
  187. regulator-min-microvolt = <3300000>;
  188. regulator-max-microvolt = <3300000>;
  189. regulator-always-on;
  190. regulator-boot-on;
  191. };
  192. ldo1_reg: ldo1 {
  193. /* VDDSHV8 - VSDMMC */
  194. /* NOTE: on rev 1.3a, data supply */
  195. regulator-name = "ldo1";
  196. regulator-min-microvolt = <1800000>;
  197. regulator-max-microvolt = <3300000>;
  198. regulator-boot-on;
  199. regulator-always-on;
  200. };
  201. ldo2_reg: ldo2 {
  202. /* VDDSH18V */
  203. regulator-name = "ldo2";
  204. regulator-min-microvolt = <1800000>;
  205. regulator-max-microvolt = <1800000>;
  206. regulator-always-on;
  207. regulator-boot-on;
  208. };
  209. ldo3_reg: ldo3 {
  210. /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
  211. regulator-name = "ldo3";
  212. regulator-min-microvolt = <1800000>;
  213. regulator-max-microvolt = <1800000>;
  214. regulator-always-on;
  215. regulator-boot-on;
  216. };
  217. ldo4_reg: ldo4 {
  218. /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
  219. regulator-name = "ldo4";
  220. regulator-min-microvolt = <1800000>;
  221. regulator-max-microvolt = <1800000>;
  222. regulator-always-on;
  223. regulator-boot-on;
  224. };
  225. /* LDO5-8 unused */
  226. ldo9_reg: ldo9 {
  227. /* VDD_RTC */
  228. regulator-name = "ldo9";
  229. regulator-min-microvolt = <840000>;
  230. regulator-max-microvolt = <1160000>;
  231. regulator-always-on;
  232. regulator-boot-on;
  233. };
  234. ldoln_reg: ldoln {
  235. /* VDDA_1V8_PLL */
  236. regulator-name = "ldoln";
  237. regulator-min-microvolt = <1800000>;
  238. regulator-max-microvolt = <1800000>;
  239. regulator-always-on;
  240. regulator-boot-on;
  241. };
  242. ldousb_reg: ldousb {
  243. /* VDDA_3V_USB: VDDA_USBHS33 */
  244. regulator-name = "ldousb";
  245. regulator-min-microvolt = <3300000>;
  246. regulator-max-microvolt = <3300000>;
  247. regulator-always-on;
  248. regulator-boot-on;
  249. };
  250. ldortc_reg: ldortc {
  251. /* VDDA_RTC */
  252. regulator-name = "ldortc";
  253. regulator-min-microvolt = <1800000>;
  254. regulator-max-microvolt = <1800000>;
  255. regulator-always-on;
  256. regulator-boot-on;
  257. };
  258. regen1: regen1 {
  259. /* VDD_3V3_ON */
  260. regulator-name = "regen1";
  261. regulator-boot-on;
  262. regulator-always-on;
  263. };
  264. regen2: regen2 {
  265. /* Needed for PMIC internal resource */
  266. regulator-name = "regen2";
  267. regulator-boot-on;
  268. regulator-always-on;
  269. };
  270. };
  271. };
  272. tps659038_rtc: tps659038_rtc {
  273. compatible = "ti,palmas-rtc";
  274. interrupt-parent = <&tps659038>;
  275. interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
  276. wakeup-source;
  277. };
  278. tps659038_pwr_button: tps659038_pwr_button {
  279. compatible = "ti,palmas-pwrbutton";
  280. interrupt-parent = <&tps659038>;
  281. interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
  282. wakeup-source;
  283. ti,palmas-long-press-seconds = <12>;
  284. };
  285. tps659038_gpio: tps659038_gpio {
  286. compatible = "ti,palmas-gpio";
  287. gpio-controller;
  288. #gpio-cells = <2>;
  289. };
  290. extcon_usb2: tps659038_usb {
  291. compatible = "ti,palmas-usb-vid";
  292. ti,enable-vbus-detection;
  293. ti,enable-id-detection;
  294. /* ID & VBUS GPIOs provided in board dts */
  295. };
  296. };
  297. tpic2810: tpic2810@60 {
  298. compatible = "ti,tpic2810";
  299. reg = <0x60>;
  300. gpio-controller;
  301. #gpio-cells = <2>;
  302. };
  303. ov2659: ov2659@30 {
  304. compatible = "ovti,ov2659";
  305. reg = <0x30>;
  306. clocks = <&src_clk_x1>;
  307. clock-names = "xvclk";
  308. pwrdn-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
  309. port {
  310. ov2659_1: endpoint {
  311. hsync-active = <1>;
  312. vsync-active = <1>;
  313. pclk-sample = <1>;
  314. link-frequencies = /bits/ 64 <70000000>;
  315. };
  316. };
  317. };
  318. };
  319. &mcspi3 {
  320. status = "okay";
  321. ti,pindir-d0-out-d1-in;
  322. sn65hvs882: sn65hvs882@0 {
  323. compatible = "pisosr-gpio";
  324. gpio-controller;
  325. #gpio-cells = <2>;
  326. reg = <0>;
  327. spi-max-frequency = <1000000>;
  328. spi-cpol;
  329. };
  330. };
  331. &uart3 {
  332. status = "okay";
  333. interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
  334. &dra7_pmx_core 0x248>;
  335. };
  336. &rtc {
  337. status = "okay";
  338. ext-clk-src;
  339. };
  340. &mac {
  341. status = "okay";
  342. dual_emac;
  343. };
  344. &cpsw_emac0 {
  345. phy_id = <&davinci_mdio>, <0>;
  346. phy-mode = "rgmii";
  347. dual_emac_res_vlan = <1>;
  348. };
  349. &cpsw_emac1 {
  350. phy_id = <&davinci_mdio>, <1>;
  351. phy-mode = "rgmii";
  352. dual_emac_res_vlan = <2>;
  353. };
  354. &usb2_phy1 {
  355. phy-supply = <&ldousb_reg>;
  356. };
  357. &usb2_phy2 {
  358. phy-supply = <&ldousb_reg>;
  359. };
  360. &usb1 {
  361. dr_mode = "host";
  362. };
  363. &omap_dwc3_2 {
  364. extcon = <&extcon_usb2>;
  365. };
  366. &usb2 {
  367. extcon = <&extcon_usb2>;
  368. dr_mode = "otg";
  369. };
  370. &mmc1 {
  371. status = "okay";
  372. vmmc-supply = <&v3_3d>;
  373. vqmmc-supply = <&ldo1_reg>;
  374. bus-width = <4>;
  375. cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
  376. };
  377. &mmc2 {
  378. status = "okay";
  379. vmmc-supply = <&v3_3d>;
  380. vqmmc-supply = <&v3_3d>;
  381. bus-width = <8>;
  382. non-removable;
  383. max-frequency = <96000000>;
  384. no-1-8-v;
  385. };
  386. &dcan1 {
  387. status = "okay";
  388. pinctrl-names = "default", "sleep", "active";
  389. pinctrl-0 = <&dcan1_pins_sleep>;
  390. pinctrl-1 = <&dcan1_pins_sleep>;
  391. pinctrl-2 = <&dcan1_pins_default>;
  392. };
  393. &qspi {
  394. status = "okay";
  395. spi-max-frequency = <76800000>;
  396. m25p80@0 {
  397. compatible = "s25fl256s1", "jedec,spi-nor";
  398. spi-max-frequency = <76800000>;
  399. reg = <0>;
  400. spi-tx-bus-width = <1>;
  401. spi-rx-bus-width = <4>;
  402. #address-cells = <1>;
  403. #size-cells = <1>;
  404. /* MTD partition table.
  405. * The ROM checks the first four physical blocks
  406. * for a valid file to boot and the flash here is
  407. * 64KiB block size.
  408. */
  409. partition@0 {
  410. label = "QSPI.SPL";
  411. reg = <0x00000000 0x000040000>;
  412. };
  413. partition@1 {
  414. label = "QSPI.u-boot";
  415. reg = <0x00040000 0x00100000>;
  416. };
  417. partition@2 {
  418. label = "QSPI.u-boot-spl-os";
  419. reg = <0x00140000 0x00080000>;
  420. };
  421. partition@3 {
  422. label = "QSPI.u-boot-env";
  423. reg = <0x001c0000 0x00010000>;
  424. };
  425. partition@4 {
  426. label = "QSPI.u-boot-env.backup1";
  427. reg = <0x001d0000 0x0010000>;
  428. };
  429. partition@5 {
  430. label = "QSPI.kernel";
  431. reg = <0x001e0000 0x0800000>;
  432. };
  433. partition@6 {
  434. label = "QSPI.file-system";
  435. reg = <0x009e0000 0x01620000>;
  436. };
  437. };
  438. };
  439. &cpu0 {
  440. vdd-supply = <&smps12_reg>;
  441. };
  442. &gpu {
  443. status = "ok";
  444. };