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@@ -129,4 +129,52 @@
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clocks = <&k3_clks 114 0>;
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clock-names = "gpio";
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};
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+
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+ cbass_mcu_navss: mcu_navss {
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+ compatible = "simple-bus";
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+ dma-coherent;
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+ dma-ranges;
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+ ranges;
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+
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+ ti,sci-dev-id = <232>;
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+
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+ mcu_ringacc: ringacc@2b800000 {
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+ compatible = "ti,am654-navss-ringacc";
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+ reg = <0x0 0x2b800000 0x0 0x400000>,
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+ <0x0 0x2b000000 0x0 0x400000>,
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+ <0x0 0x28590000 0x0 0x100>,
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+ <0x0 0x2a500000 0x0 0x40000>;
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+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
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+ ti,num-rings = <286>;
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+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
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+ ti,sci = <&dmsc>;
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+ ti,sci-dev-id = <235>;
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+ interrupt-parent = <&main_udmass_inta>;
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+ };
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+
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+ mcu_udmap: udmap@31150000 {
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+ compatible = "ti,j721e-navss-mcu-udmap";
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+ reg = <0x0 0x285c0000 0x0 0x100>,
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+ <0x0 0x2a800000 0x0 0x40000>,
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+ <0x0 0x2aa00000 0x0 0x40000>;
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+ reg-names = "gcfg", "rchanrt", "tchanrt";
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+ #dma-cells = <3>;
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+
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+ ti,ringacc = <&mcu_ringacc>;
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+ ti,psil-base = <0x6000>;
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+
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+ ti,sci = <&dmsc>;
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+ ti,sci-dev-id = <236>;
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+
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+ ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
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+ <0x0f>; /* TX_HCHAN */
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+ ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
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+ <0x0b>; /* RX_HCHAN */
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+ ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
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+
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+ interrupt-parent = <&main_udmass_inta>;
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+ };
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+ };
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};
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