pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. #ifdef CONFIG_NUMA
  74. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  75. cpumask_of_node(dev_to_node(dev));
  76. #else
  77. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  78. #endif
  79. return cpumap_print_to_pagebuf(list, buf, mask);
  80. }
  81. static ssize_t local_cpus_show(struct device *dev,
  82. struct device_attribute *attr, char *buf)
  83. {
  84. return pci_dev_show_local_cpu(dev, false, attr, buf);
  85. }
  86. static DEVICE_ATTR_RO(local_cpus);
  87. static ssize_t local_cpulist_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, true, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpulist);
  93. /*
  94. * PCI Bus Class Devices
  95. */
  96. static ssize_t cpuaffinity_show(struct device *dev,
  97. struct device_attribute *attr, char *buf)
  98. {
  99. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  100. return cpumap_print_to_pagebuf(false, buf, cpumask);
  101. }
  102. static DEVICE_ATTR_RO(cpuaffinity);
  103. static ssize_t cpulistaffinity_show(struct device *dev,
  104. struct device_attribute *attr, char *buf)
  105. {
  106. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  107. return cpumap_print_to_pagebuf(true, buf, cpumask);
  108. }
  109. static DEVICE_ATTR_RO(cpulistaffinity);
  110. /* show resources */
  111. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  112. char *buf)
  113. {
  114. struct pci_dev *pci_dev = to_pci_dev(dev);
  115. char *str = buf;
  116. int i;
  117. int max;
  118. resource_size_t start, end;
  119. if (pci_dev->subordinate)
  120. max = DEVICE_COUNT_RESOURCE;
  121. else
  122. max = PCI_BRIDGE_RESOURCES;
  123. for (i = 0; i < max; i++) {
  124. struct resource *res = &pci_dev->resource[i];
  125. pci_resource_to_user(pci_dev, i, res, &start, &end);
  126. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  127. (unsigned long long)start,
  128. (unsigned long long)end,
  129. (unsigned long long)res->flags);
  130. }
  131. return (str - buf);
  132. }
  133. static DEVICE_ATTR_RO(resource);
  134. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  135. char *buf)
  136. {
  137. struct pci_dev *pci_dev = to_pci_dev(dev);
  138. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  139. pci_dev->vendor, pci_dev->device,
  140. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  141. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  142. (u8)(pci_dev->class));
  143. }
  144. static DEVICE_ATTR_RO(modalias);
  145. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  146. const char *buf, size_t count)
  147. {
  148. struct pci_dev *pdev = to_pci_dev(dev);
  149. unsigned long val;
  150. ssize_t result = kstrtoul(buf, 0, &val);
  151. if (result < 0)
  152. return result;
  153. /* this can crash the machine when done on the "wrong" device */
  154. if (!capable(CAP_SYS_ADMIN))
  155. return -EPERM;
  156. if (!val) {
  157. if (pci_is_enabled(pdev))
  158. pci_disable_device(pdev);
  159. else
  160. result = -EIO;
  161. } else
  162. result = pci_enable_device(pdev);
  163. return result < 0 ? result : count;
  164. }
  165. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  166. char *buf)
  167. {
  168. struct pci_dev *pdev;
  169. pdev = to_pci_dev(dev);
  170. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  171. }
  172. static DEVICE_ATTR_RW(enable);
  173. #ifdef CONFIG_NUMA
  174. static ssize_t numa_node_store(struct device *dev,
  175. struct device_attribute *attr, const char *buf,
  176. size_t count)
  177. {
  178. struct pci_dev *pdev = to_pci_dev(dev);
  179. int node, ret;
  180. if (!capable(CAP_SYS_ADMIN))
  181. return -EPERM;
  182. ret = kstrtoint(buf, 0, &node);
  183. if (ret)
  184. return ret;
  185. if (!node_online(node))
  186. return -EINVAL;
  187. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  188. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  189. node);
  190. dev->numa_node = node;
  191. return count;
  192. }
  193. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  194. char *buf)
  195. {
  196. return sprintf(buf, "%d\n", dev->numa_node);
  197. }
  198. static DEVICE_ATTR_RW(numa_node);
  199. #endif
  200. static ssize_t dma_mask_bits_show(struct device *dev,
  201. struct device_attribute *attr, char *buf)
  202. {
  203. struct pci_dev *pdev = to_pci_dev(dev);
  204. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  205. }
  206. static DEVICE_ATTR_RO(dma_mask_bits);
  207. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  208. struct device_attribute *attr,
  209. char *buf)
  210. {
  211. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  212. }
  213. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  214. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  215. char *buf)
  216. {
  217. struct pci_dev *pdev = to_pci_dev(dev);
  218. struct pci_bus *subordinate = pdev->subordinate;
  219. return sprintf(buf, "%u\n", subordinate ?
  220. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  221. : !pdev->no_msi);
  222. }
  223. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  224. const char *buf, size_t count)
  225. {
  226. struct pci_dev *pdev = to_pci_dev(dev);
  227. struct pci_bus *subordinate = pdev->subordinate;
  228. unsigned long val;
  229. if (kstrtoul(buf, 0, &val) < 0)
  230. return -EINVAL;
  231. if (!capable(CAP_SYS_ADMIN))
  232. return -EPERM;
  233. /*
  234. * "no_msi" and "bus_flags" only affect what happens when a driver
  235. * requests MSI or MSI-X. They don't affect any drivers that have
  236. * already requested MSI or MSI-X.
  237. */
  238. if (!subordinate) {
  239. pdev->no_msi = !val;
  240. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  241. val ? "allowed" : "disallowed");
  242. return count;
  243. }
  244. if (val)
  245. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  246. else
  247. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  248. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  249. val ? "allowed" : "disallowed");
  250. return count;
  251. }
  252. static DEVICE_ATTR_RW(msi_bus);
  253. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  254. size_t count)
  255. {
  256. unsigned long val;
  257. struct pci_bus *b = NULL;
  258. if (kstrtoul(buf, 0, &val) < 0)
  259. return -EINVAL;
  260. if (val) {
  261. pci_lock_rescan_remove();
  262. while ((b = pci_find_next_bus(b)) != NULL)
  263. pci_rescan_bus(b);
  264. pci_unlock_rescan_remove();
  265. }
  266. return count;
  267. }
  268. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  269. static struct attribute *pci_bus_attrs[] = {
  270. &bus_attr_rescan.attr,
  271. NULL,
  272. };
  273. static const struct attribute_group pci_bus_group = {
  274. .attrs = pci_bus_attrs,
  275. };
  276. const struct attribute_group *pci_bus_groups[] = {
  277. &pci_bus_group,
  278. NULL,
  279. };
  280. static ssize_t dev_rescan_store(struct device *dev,
  281. struct device_attribute *attr, const char *buf,
  282. size_t count)
  283. {
  284. unsigned long val;
  285. struct pci_dev *pdev = to_pci_dev(dev);
  286. if (kstrtoul(buf, 0, &val) < 0)
  287. return -EINVAL;
  288. if (val) {
  289. pci_lock_rescan_remove();
  290. pci_rescan_bus(pdev->bus);
  291. pci_unlock_rescan_remove();
  292. }
  293. return count;
  294. }
  295. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  296. (S_IWUSR|S_IWGRP),
  297. NULL, dev_rescan_store);
  298. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  299. const char *buf, size_t count)
  300. {
  301. unsigned long val;
  302. if (kstrtoul(buf, 0, &val) < 0)
  303. return -EINVAL;
  304. if (val && device_remove_file_self(dev, attr))
  305. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  306. return count;
  307. }
  308. static struct device_attribute dev_remove_attr = __ATTR(remove,
  309. (S_IWUSR|S_IWGRP),
  310. NULL, remove_store);
  311. static ssize_t dev_bus_rescan_store(struct device *dev,
  312. struct device_attribute *attr,
  313. const char *buf, size_t count)
  314. {
  315. unsigned long val;
  316. struct pci_bus *bus = to_pci_bus(dev);
  317. if (kstrtoul(buf, 0, &val) < 0)
  318. return -EINVAL;
  319. if (val) {
  320. pci_lock_rescan_remove();
  321. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  322. pci_rescan_bus_bridge_resize(bus->self);
  323. else
  324. pci_rescan_bus(bus);
  325. pci_unlock_rescan_remove();
  326. }
  327. return count;
  328. }
  329. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  330. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  331. static ssize_t d3cold_allowed_store(struct device *dev,
  332. struct device_attribute *attr,
  333. const char *buf, size_t count)
  334. {
  335. struct pci_dev *pdev = to_pci_dev(dev);
  336. unsigned long val;
  337. if (kstrtoul(buf, 0, &val) < 0)
  338. return -EINVAL;
  339. pdev->d3cold_allowed = !!val;
  340. pm_runtime_resume(dev);
  341. return count;
  342. }
  343. static ssize_t d3cold_allowed_show(struct device *dev,
  344. struct device_attribute *attr, char *buf)
  345. {
  346. struct pci_dev *pdev = to_pci_dev(dev);
  347. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  348. }
  349. static DEVICE_ATTR_RW(d3cold_allowed);
  350. #endif
  351. #ifdef CONFIG_OF
  352. static ssize_t devspec_show(struct device *dev,
  353. struct device_attribute *attr, char *buf)
  354. {
  355. struct pci_dev *pdev = to_pci_dev(dev);
  356. struct device_node *np = pci_device_to_OF_node(pdev);
  357. if (np == NULL || np->full_name == NULL)
  358. return 0;
  359. return sprintf(buf, "%s", np->full_name);
  360. }
  361. static DEVICE_ATTR_RO(devspec);
  362. #endif
  363. #ifdef CONFIG_PCI_IOV
  364. static ssize_t sriov_totalvfs_show(struct device *dev,
  365. struct device_attribute *attr,
  366. char *buf)
  367. {
  368. struct pci_dev *pdev = to_pci_dev(dev);
  369. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  370. }
  371. static ssize_t sriov_numvfs_show(struct device *dev,
  372. struct device_attribute *attr,
  373. char *buf)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  377. }
  378. /*
  379. * num_vfs > 0; number of VFs to enable
  380. * num_vfs = 0; disable all VFs
  381. *
  382. * Note: SRIOV spec doesn't allow partial VF
  383. * disable, so it's all or none.
  384. */
  385. static ssize_t sriov_numvfs_store(struct device *dev,
  386. struct device_attribute *attr,
  387. const char *buf, size_t count)
  388. {
  389. struct pci_dev *pdev = to_pci_dev(dev);
  390. int ret;
  391. u16 num_vfs;
  392. ret = kstrtou16(buf, 0, &num_vfs);
  393. if (ret < 0)
  394. return ret;
  395. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  396. return -ERANGE;
  397. if (num_vfs == pdev->sriov->num_VFs)
  398. return count; /* no change */
  399. /* is PF driver loaded w/callback */
  400. if (!pdev->driver || !pdev->driver->sriov_configure) {
  401. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  402. return -ENOSYS;
  403. }
  404. if (num_vfs == 0) {
  405. /* disable VFs */
  406. ret = pdev->driver->sriov_configure(pdev, 0);
  407. if (ret < 0)
  408. return ret;
  409. return count;
  410. }
  411. /* enable VFs */
  412. if (pdev->sriov->num_VFs) {
  413. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  414. pdev->sriov->num_VFs, num_vfs);
  415. return -EBUSY;
  416. }
  417. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  418. if (ret < 0)
  419. return ret;
  420. if (ret != num_vfs)
  421. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  422. num_vfs, ret);
  423. return count;
  424. }
  425. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  426. static struct device_attribute sriov_numvfs_attr =
  427. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  428. sriov_numvfs_show, sriov_numvfs_store);
  429. #endif /* CONFIG_PCI_IOV */
  430. static ssize_t driver_override_store(struct device *dev,
  431. struct device_attribute *attr,
  432. const char *buf, size_t count)
  433. {
  434. struct pci_dev *pdev = to_pci_dev(dev);
  435. char *driver_override, *old = pdev->driver_override, *cp;
  436. if (count > PATH_MAX)
  437. return -EINVAL;
  438. driver_override = kstrndup(buf, count, GFP_KERNEL);
  439. if (!driver_override)
  440. return -ENOMEM;
  441. cp = strchr(driver_override, '\n');
  442. if (cp)
  443. *cp = '\0';
  444. if (strlen(driver_override)) {
  445. pdev->driver_override = driver_override;
  446. } else {
  447. kfree(driver_override);
  448. pdev->driver_override = NULL;
  449. }
  450. kfree(old);
  451. return count;
  452. }
  453. static ssize_t driver_override_show(struct device *dev,
  454. struct device_attribute *attr, char *buf)
  455. {
  456. struct pci_dev *pdev = to_pci_dev(dev);
  457. return sprintf(buf, "%s\n", pdev->driver_override);
  458. }
  459. static DEVICE_ATTR_RW(driver_override);
  460. static struct attribute *pci_dev_attrs[] = {
  461. &dev_attr_resource.attr,
  462. &dev_attr_vendor.attr,
  463. &dev_attr_device.attr,
  464. &dev_attr_subsystem_vendor.attr,
  465. &dev_attr_subsystem_device.attr,
  466. &dev_attr_class.attr,
  467. &dev_attr_irq.attr,
  468. &dev_attr_local_cpus.attr,
  469. &dev_attr_local_cpulist.attr,
  470. &dev_attr_modalias.attr,
  471. #ifdef CONFIG_NUMA
  472. &dev_attr_numa_node.attr,
  473. #endif
  474. &dev_attr_dma_mask_bits.attr,
  475. &dev_attr_consistent_dma_mask_bits.attr,
  476. &dev_attr_enable.attr,
  477. &dev_attr_broken_parity_status.attr,
  478. &dev_attr_msi_bus.attr,
  479. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  480. &dev_attr_d3cold_allowed.attr,
  481. #endif
  482. #ifdef CONFIG_OF
  483. &dev_attr_devspec.attr,
  484. #endif
  485. &dev_attr_driver_override.attr,
  486. NULL,
  487. };
  488. static const struct attribute_group pci_dev_group = {
  489. .attrs = pci_dev_attrs,
  490. };
  491. const struct attribute_group *pci_dev_groups[] = {
  492. &pci_dev_group,
  493. NULL,
  494. };
  495. static struct attribute *pcibus_attrs[] = {
  496. &dev_attr_rescan.attr,
  497. &dev_attr_cpuaffinity.attr,
  498. &dev_attr_cpulistaffinity.attr,
  499. NULL,
  500. };
  501. static const struct attribute_group pcibus_group = {
  502. .attrs = pcibus_attrs,
  503. };
  504. const struct attribute_group *pcibus_groups[] = {
  505. &pcibus_group,
  506. NULL,
  507. };
  508. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  509. char *buf)
  510. {
  511. struct pci_dev *pdev = to_pci_dev(dev);
  512. struct pci_dev *vga_dev = vga_default_device();
  513. if (vga_dev)
  514. return sprintf(buf, "%u\n", (pdev == vga_dev));
  515. return sprintf(buf, "%u\n",
  516. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  517. IORESOURCE_ROM_SHADOW));
  518. }
  519. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  520. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  521. struct bin_attribute *bin_attr, char *buf,
  522. loff_t off, size_t count)
  523. {
  524. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  525. kobj));
  526. unsigned int size = 64;
  527. loff_t init_off = off;
  528. u8 *data = (u8 *) buf;
  529. /* Several chips lock up trying to read undefined config space */
  530. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0)
  531. size = dev->cfg_size;
  532. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  533. size = 128;
  534. if (off > size)
  535. return 0;
  536. if (off + count > size) {
  537. size -= off;
  538. count = size;
  539. } else {
  540. size = count;
  541. }
  542. pci_config_pm_runtime_get(dev);
  543. if ((off & 1) && size) {
  544. u8 val;
  545. pci_user_read_config_byte(dev, off, &val);
  546. data[off - init_off] = val;
  547. off++;
  548. size--;
  549. }
  550. if ((off & 3) && size > 2) {
  551. u16 val;
  552. pci_user_read_config_word(dev, off, &val);
  553. data[off - init_off] = val & 0xff;
  554. data[off - init_off + 1] = (val >> 8) & 0xff;
  555. off += 2;
  556. size -= 2;
  557. }
  558. while (size > 3) {
  559. u32 val;
  560. pci_user_read_config_dword(dev, off, &val);
  561. data[off - init_off] = val & 0xff;
  562. data[off - init_off + 1] = (val >> 8) & 0xff;
  563. data[off - init_off + 2] = (val >> 16) & 0xff;
  564. data[off - init_off + 3] = (val >> 24) & 0xff;
  565. off += 4;
  566. size -= 4;
  567. }
  568. if (size >= 2) {
  569. u16 val;
  570. pci_user_read_config_word(dev, off, &val);
  571. data[off - init_off] = val & 0xff;
  572. data[off - init_off + 1] = (val >> 8) & 0xff;
  573. off += 2;
  574. size -= 2;
  575. }
  576. if (size > 0) {
  577. u8 val;
  578. pci_user_read_config_byte(dev, off, &val);
  579. data[off - init_off] = val;
  580. off++;
  581. --size;
  582. }
  583. pci_config_pm_runtime_put(dev);
  584. return count;
  585. }
  586. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  587. struct bin_attribute *bin_attr, char *buf,
  588. loff_t off, size_t count)
  589. {
  590. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  591. kobj));
  592. unsigned int size = count;
  593. loff_t init_off = off;
  594. u8 *data = (u8 *) buf;
  595. if (off > dev->cfg_size)
  596. return 0;
  597. if (off + count > dev->cfg_size) {
  598. size = dev->cfg_size - off;
  599. count = size;
  600. }
  601. pci_config_pm_runtime_get(dev);
  602. if ((off & 1) && size) {
  603. pci_user_write_config_byte(dev, off, data[off - init_off]);
  604. off++;
  605. size--;
  606. }
  607. if ((off & 3) && size > 2) {
  608. u16 val = data[off - init_off];
  609. val |= (u16) data[off - init_off + 1] << 8;
  610. pci_user_write_config_word(dev, off, val);
  611. off += 2;
  612. size -= 2;
  613. }
  614. while (size > 3) {
  615. u32 val = data[off - init_off];
  616. val |= (u32) data[off - init_off + 1] << 8;
  617. val |= (u32) data[off - init_off + 2] << 16;
  618. val |= (u32) data[off - init_off + 3] << 24;
  619. pci_user_write_config_dword(dev, off, val);
  620. off += 4;
  621. size -= 4;
  622. }
  623. if (size >= 2) {
  624. u16 val = data[off - init_off];
  625. val |= (u16) data[off - init_off + 1] << 8;
  626. pci_user_write_config_word(dev, off, val);
  627. off += 2;
  628. size -= 2;
  629. }
  630. if (size) {
  631. pci_user_write_config_byte(dev, off, data[off - init_off]);
  632. off++;
  633. --size;
  634. }
  635. pci_config_pm_runtime_put(dev);
  636. return count;
  637. }
  638. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  639. struct bin_attribute *bin_attr, char *buf,
  640. loff_t off, size_t count)
  641. {
  642. struct pci_dev *dev =
  643. to_pci_dev(container_of(kobj, struct device, kobj));
  644. if (off > bin_attr->size)
  645. count = 0;
  646. else if (count > bin_attr->size - off)
  647. count = bin_attr->size - off;
  648. return pci_read_vpd(dev, off, count, buf);
  649. }
  650. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  651. struct bin_attribute *bin_attr, char *buf,
  652. loff_t off, size_t count)
  653. {
  654. struct pci_dev *dev =
  655. to_pci_dev(container_of(kobj, struct device, kobj));
  656. if (off > bin_attr->size)
  657. count = 0;
  658. else if (count > bin_attr->size - off)
  659. count = bin_attr->size - off;
  660. return pci_write_vpd(dev, off, count, buf);
  661. }
  662. #ifdef HAVE_PCI_LEGACY
  663. /**
  664. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  665. * @filp: open sysfs file
  666. * @kobj: kobject corresponding to file to read from
  667. * @bin_attr: struct bin_attribute for this file
  668. * @buf: buffer to store results
  669. * @off: offset into legacy I/O port space
  670. * @count: number of bytes to read
  671. *
  672. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  673. * callback routine (pci_legacy_read).
  674. */
  675. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  676. struct bin_attribute *bin_attr, char *buf,
  677. loff_t off, size_t count)
  678. {
  679. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  680. kobj));
  681. /* Only support 1, 2 or 4 byte accesses */
  682. if (count != 1 && count != 2 && count != 4)
  683. return -EINVAL;
  684. return pci_legacy_read(bus, off, (u32 *)buf, count);
  685. }
  686. /**
  687. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  688. * @filp: open sysfs file
  689. * @kobj: kobject corresponding to file to read from
  690. * @bin_attr: struct bin_attribute for this file
  691. * @buf: buffer containing value to be written
  692. * @off: offset into legacy I/O port space
  693. * @count: number of bytes to write
  694. *
  695. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  696. * callback routine (pci_legacy_write).
  697. */
  698. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  699. struct bin_attribute *bin_attr, char *buf,
  700. loff_t off, size_t count)
  701. {
  702. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  703. kobj));
  704. /* Only support 1, 2 or 4 byte accesses */
  705. if (count != 1 && count != 2 && count != 4)
  706. return -EINVAL;
  707. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  708. }
  709. /**
  710. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  711. * @filp: open sysfs file
  712. * @kobj: kobject corresponding to device to be mapped
  713. * @attr: struct bin_attribute for this file
  714. * @vma: struct vm_area_struct passed to mmap
  715. *
  716. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  717. * legacy memory space (first meg of bus space) into application virtual
  718. * memory space.
  719. */
  720. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  721. struct bin_attribute *attr,
  722. struct vm_area_struct *vma)
  723. {
  724. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  725. kobj));
  726. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  727. }
  728. /**
  729. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  730. * @filp: open sysfs file
  731. * @kobj: kobject corresponding to device to be mapped
  732. * @attr: struct bin_attribute for this file
  733. * @vma: struct vm_area_struct passed to mmap
  734. *
  735. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  736. * legacy IO space (first meg of bus space) into application virtual
  737. * memory space. Returns -ENOSYS if the operation isn't supported
  738. */
  739. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  740. struct bin_attribute *attr,
  741. struct vm_area_struct *vma)
  742. {
  743. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  744. kobj));
  745. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  746. }
  747. /**
  748. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  749. * @b: bus to create files under
  750. * @mmap_type: I/O port or memory
  751. *
  752. * Stub implementation. Can be overridden by arch if necessary.
  753. */
  754. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  755. enum pci_mmap_state mmap_type)
  756. {
  757. }
  758. /**
  759. * pci_create_legacy_files - create legacy I/O port and memory files
  760. * @b: bus to create files under
  761. *
  762. * Some platforms allow access to legacy I/O port and ISA memory space on
  763. * a per-bus basis. This routine creates the files and ties them into
  764. * their associated read, write and mmap files from pci-sysfs.c
  765. *
  766. * On error unwind, but don't propagate the error to the caller
  767. * as it is ok to set up the PCI bus without these files.
  768. */
  769. void pci_create_legacy_files(struct pci_bus *b)
  770. {
  771. int error;
  772. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  773. GFP_ATOMIC);
  774. if (!b->legacy_io)
  775. goto kzalloc_err;
  776. sysfs_bin_attr_init(b->legacy_io);
  777. b->legacy_io->attr.name = "legacy_io";
  778. b->legacy_io->size = 0xffff;
  779. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  780. b->legacy_io->read = pci_read_legacy_io;
  781. b->legacy_io->write = pci_write_legacy_io;
  782. b->legacy_io->mmap = pci_mmap_legacy_io;
  783. pci_adjust_legacy_attr(b, pci_mmap_io);
  784. error = device_create_bin_file(&b->dev, b->legacy_io);
  785. if (error)
  786. goto legacy_io_err;
  787. /* Allocated above after the legacy_io struct */
  788. b->legacy_mem = b->legacy_io + 1;
  789. sysfs_bin_attr_init(b->legacy_mem);
  790. b->legacy_mem->attr.name = "legacy_mem";
  791. b->legacy_mem->size = 1024*1024;
  792. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  793. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  794. pci_adjust_legacy_attr(b, pci_mmap_mem);
  795. error = device_create_bin_file(&b->dev, b->legacy_mem);
  796. if (error)
  797. goto legacy_mem_err;
  798. return;
  799. legacy_mem_err:
  800. device_remove_bin_file(&b->dev, b->legacy_io);
  801. legacy_io_err:
  802. kfree(b->legacy_io);
  803. b->legacy_io = NULL;
  804. kzalloc_err:
  805. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  806. return;
  807. }
  808. void pci_remove_legacy_files(struct pci_bus *b)
  809. {
  810. if (b->legacy_io) {
  811. device_remove_bin_file(&b->dev, b->legacy_io);
  812. device_remove_bin_file(&b->dev, b->legacy_mem);
  813. kfree(b->legacy_io); /* both are allocated here */
  814. }
  815. }
  816. #endif /* HAVE_PCI_LEGACY */
  817. #ifdef HAVE_PCI_MMAP
  818. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  819. enum pci_mmap_api mmap_api)
  820. {
  821. unsigned long nr, start, size, pci_start;
  822. if (pci_resource_len(pdev, resno) == 0)
  823. return 0;
  824. nr = vma_pages(vma);
  825. start = vma->vm_pgoff;
  826. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  827. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  828. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  829. if (start >= pci_start && start < pci_start + size &&
  830. start + nr <= pci_start + size)
  831. return 1;
  832. return 0;
  833. }
  834. /**
  835. * pci_mmap_resource - map a PCI resource into user memory space
  836. * @kobj: kobject for mapping
  837. * @attr: struct bin_attribute for the file being mapped
  838. * @vma: struct vm_area_struct passed into the mmap
  839. * @write_combine: 1 for write_combine mapping
  840. *
  841. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  842. */
  843. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  844. struct vm_area_struct *vma, int write_combine)
  845. {
  846. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  847. struct device, kobj));
  848. struct resource *res = attr->private;
  849. enum pci_mmap_state mmap_type;
  850. resource_size_t start, end;
  851. int i;
  852. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  853. if (res == &pdev->resource[i])
  854. break;
  855. if (i >= PCI_ROM_RESOURCE)
  856. return -ENODEV;
  857. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  858. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  859. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  860. pci_name(pdev), i,
  861. (u64)pci_resource_start(pdev, i),
  862. (u64)pci_resource_len(pdev, i));
  863. return -EINVAL;
  864. }
  865. /* pci_mmap_page_range() expects the same kind of entry as coming
  866. * from /proc/bus/pci/ which is a "user visible" value. If this is
  867. * different from the resource itself, arch will do necessary fixup.
  868. */
  869. pci_resource_to_user(pdev, i, res, &start, &end);
  870. vma->vm_pgoff += start >> PAGE_SHIFT;
  871. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  872. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  873. return -EINVAL;
  874. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  875. }
  876. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  877. struct bin_attribute *attr,
  878. struct vm_area_struct *vma)
  879. {
  880. return pci_mmap_resource(kobj, attr, vma, 0);
  881. }
  882. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  883. struct bin_attribute *attr,
  884. struct vm_area_struct *vma)
  885. {
  886. return pci_mmap_resource(kobj, attr, vma, 1);
  887. }
  888. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  889. struct bin_attribute *attr, char *buf,
  890. loff_t off, size_t count, bool write)
  891. {
  892. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  893. struct device, kobj));
  894. struct resource *res = attr->private;
  895. unsigned long port = off;
  896. int i;
  897. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  898. if (res == &pdev->resource[i])
  899. break;
  900. if (i >= PCI_ROM_RESOURCE)
  901. return -ENODEV;
  902. port += pci_resource_start(pdev, i);
  903. if (port > pci_resource_end(pdev, i))
  904. return 0;
  905. if (port + count - 1 > pci_resource_end(pdev, i))
  906. return -EINVAL;
  907. switch (count) {
  908. case 1:
  909. if (write)
  910. outb(*(u8 *)buf, port);
  911. else
  912. *(u8 *)buf = inb(port);
  913. return 1;
  914. case 2:
  915. if (write)
  916. outw(*(u16 *)buf, port);
  917. else
  918. *(u16 *)buf = inw(port);
  919. return 2;
  920. case 4:
  921. if (write)
  922. outl(*(u32 *)buf, port);
  923. else
  924. *(u32 *)buf = inl(port);
  925. return 4;
  926. }
  927. return -EINVAL;
  928. }
  929. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  930. struct bin_attribute *attr, char *buf,
  931. loff_t off, size_t count)
  932. {
  933. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  934. }
  935. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  936. struct bin_attribute *attr, char *buf,
  937. loff_t off, size_t count)
  938. {
  939. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  940. }
  941. /**
  942. * pci_remove_resource_files - cleanup resource files
  943. * @pdev: dev to cleanup
  944. *
  945. * If we created resource files for @pdev, remove them from sysfs and
  946. * free their resources.
  947. */
  948. static void pci_remove_resource_files(struct pci_dev *pdev)
  949. {
  950. int i;
  951. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  952. struct bin_attribute *res_attr;
  953. res_attr = pdev->res_attr[i];
  954. if (res_attr) {
  955. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  956. kfree(res_attr);
  957. }
  958. res_attr = pdev->res_attr_wc[i];
  959. if (res_attr) {
  960. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  961. kfree(res_attr);
  962. }
  963. }
  964. }
  965. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  966. {
  967. /* allocate attribute structure, piggyback attribute name */
  968. int name_len = write_combine ? 13 : 10;
  969. struct bin_attribute *res_attr;
  970. int retval;
  971. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  972. if (res_attr) {
  973. char *res_attr_name = (char *)(res_attr + 1);
  974. sysfs_bin_attr_init(res_attr);
  975. if (write_combine) {
  976. pdev->res_attr_wc[num] = res_attr;
  977. sprintf(res_attr_name, "resource%d_wc", num);
  978. res_attr->mmap = pci_mmap_resource_wc;
  979. } else {
  980. pdev->res_attr[num] = res_attr;
  981. sprintf(res_attr_name, "resource%d", num);
  982. res_attr->mmap = pci_mmap_resource_uc;
  983. }
  984. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  985. res_attr->read = pci_read_resource_io;
  986. res_attr->write = pci_write_resource_io;
  987. }
  988. res_attr->attr.name = res_attr_name;
  989. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  990. res_attr->size = pci_resource_len(pdev, num);
  991. res_attr->private = &pdev->resource[num];
  992. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  993. } else
  994. retval = -ENOMEM;
  995. return retval;
  996. }
  997. /**
  998. * pci_create_resource_files - create resource files in sysfs for @dev
  999. * @pdev: dev in question
  1000. *
  1001. * Walk the resources in @pdev creating files for each resource available.
  1002. */
  1003. static int pci_create_resource_files(struct pci_dev *pdev)
  1004. {
  1005. int i;
  1006. int retval;
  1007. /* Expose the PCI resources from this device as files */
  1008. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1009. /* skip empty resources */
  1010. if (!pci_resource_len(pdev, i))
  1011. continue;
  1012. retval = pci_create_attr(pdev, i, 0);
  1013. /* for prefetchable resources, create a WC mappable file */
  1014. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1015. retval = pci_create_attr(pdev, i, 1);
  1016. if (retval) {
  1017. pci_remove_resource_files(pdev);
  1018. return retval;
  1019. }
  1020. }
  1021. return 0;
  1022. }
  1023. #else /* !HAVE_PCI_MMAP */
  1024. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1025. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1026. #endif /* HAVE_PCI_MMAP */
  1027. /**
  1028. * pci_write_rom - used to enable access to the PCI ROM display
  1029. * @filp: sysfs file
  1030. * @kobj: kernel object handle
  1031. * @bin_attr: struct bin_attribute for this file
  1032. * @buf: user input
  1033. * @off: file offset
  1034. * @count: number of byte in input
  1035. *
  1036. * writing anything except 0 enables it
  1037. */
  1038. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1039. struct bin_attribute *bin_attr, char *buf,
  1040. loff_t off, size_t count)
  1041. {
  1042. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1043. if ((off == 0) && (*buf == '0') && (count == 2))
  1044. pdev->rom_attr_enabled = 0;
  1045. else
  1046. pdev->rom_attr_enabled = 1;
  1047. return count;
  1048. }
  1049. /**
  1050. * pci_read_rom - read a PCI ROM
  1051. * @filp: sysfs file
  1052. * @kobj: kernel object handle
  1053. * @bin_attr: struct bin_attribute for this file
  1054. * @buf: where to put the data we read from the ROM
  1055. * @off: file offset
  1056. * @count: number of bytes to read
  1057. *
  1058. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1059. * device corresponding to @kobj.
  1060. */
  1061. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1062. struct bin_attribute *bin_attr, char *buf,
  1063. loff_t off, size_t count)
  1064. {
  1065. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1066. void __iomem *rom;
  1067. size_t size;
  1068. if (!pdev->rom_attr_enabled)
  1069. return -EINVAL;
  1070. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1071. if (!rom || !size)
  1072. return -EIO;
  1073. if (off >= size)
  1074. count = 0;
  1075. else {
  1076. if (off + count > size)
  1077. count = size - off;
  1078. memcpy_fromio(buf, rom + off, count);
  1079. }
  1080. pci_unmap_rom(pdev, rom);
  1081. return count;
  1082. }
  1083. static struct bin_attribute pci_config_attr = {
  1084. .attr = {
  1085. .name = "config",
  1086. .mode = S_IRUGO | S_IWUSR,
  1087. },
  1088. .size = PCI_CFG_SPACE_SIZE,
  1089. .read = pci_read_config,
  1090. .write = pci_write_config,
  1091. };
  1092. static struct bin_attribute pcie_config_attr = {
  1093. .attr = {
  1094. .name = "config",
  1095. .mode = S_IRUGO | S_IWUSR,
  1096. },
  1097. .size = PCI_CFG_SPACE_EXP_SIZE,
  1098. .read = pci_read_config,
  1099. .write = pci_write_config,
  1100. };
  1101. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1102. const char *buf, size_t count)
  1103. {
  1104. struct pci_dev *pdev = to_pci_dev(dev);
  1105. unsigned long val;
  1106. ssize_t result = kstrtoul(buf, 0, &val);
  1107. if (result < 0)
  1108. return result;
  1109. if (val != 1)
  1110. return -EINVAL;
  1111. result = pci_reset_function(pdev);
  1112. if (result < 0)
  1113. return result;
  1114. return count;
  1115. }
  1116. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1117. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1118. {
  1119. int retval;
  1120. struct bin_attribute *attr;
  1121. /* If the device has VPD, try to expose it in sysfs. */
  1122. if (dev->vpd) {
  1123. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1124. if (!attr)
  1125. return -ENOMEM;
  1126. sysfs_bin_attr_init(attr);
  1127. attr->size = dev->vpd->len;
  1128. attr->attr.name = "vpd";
  1129. attr->attr.mode = S_IRUSR | S_IWUSR;
  1130. attr->read = read_vpd_attr;
  1131. attr->write = write_vpd_attr;
  1132. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1133. if (retval) {
  1134. kfree(attr);
  1135. return retval;
  1136. }
  1137. dev->vpd->attr = attr;
  1138. }
  1139. /* Active State Power Management */
  1140. pcie_aspm_create_sysfs_dev_files(dev);
  1141. if (!pci_probe_reset_function(dev)) {
  1142. retval = device_create_file(&dev->dev, &reset_attr);
  1143. if (retval)
  1144. goto error;
  1145. dev->reset_fn = 1;
  1146. }
  1147. return 0;
  1148. error:
  1149. pcie_aspm_remove_sysfs_dev_files(dev);
  1150. if (dev->vpd && dev->vpd->attr) {
  1151. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1152. kfree(dev->vpd->attr);
  1153. }
  1154. return retval;
  1155. }
  1156. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1157. {
  1158. int retval;
  1159. int rom_size = 0;
  1160. struct bin_attribute *attr;
  1161. if (!sysfs_initialized)
  1162. return -EACCES;
  1163. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1164. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1165. else
  1166. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1167. if (retval)
  1168. goto err;
  1169. retval = pci_create_resource_files(pdev);
  1170. if (retval)
  1171. goto err_config_file;
  1172. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1173. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1174. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1175. rom_size = 0x20000;
  1176. /* If the device has a ROM, try to expose it in sysfs. */
  1177. if (rom_size) {
  1178. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1179. if (!attr) {
  1180. retval = -ENOMEM;
  1181. goto err_resource_files;
  1182. }
  1183. sysfs_bin_attr_init(attr);
  1184. attr->size = rom_size;
  1185. attr->attr.name = "rom";
  1186. attr->attr.mode = S_IRUSR | S_IWUSR;
  1187. attr->read = pci_read_rom;
  1188. attr->write = pci_write_rom;
  1189. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1190. if (retval) {
  1191. kfree(attr);
  1192. goto err_resource_files;
  1193. }
  1194. pdev->rom_attr = attr;
  1195. }
  1196. /* add sysfs entries for various capabilities */
  1197. retval = pci_create_capabilities_sysfs(pdev);
  1198. if (retval)
  1199. goto err_rom_file;
  1200. pci_create_firmware_label_files(pdev);
  1201. return 0;
  1202. err_rom_file:
  1203. if (rom_size) {
  1204. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1205. kfree(pdev->rom_attr);
  1206. pdev->rom_attr = NULL;
  1207. }
  1208. err_resource_files:
  1209. pci_remove_resource_files(pdev);
  1210. err_config_file:
  1211. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1213. else
  1214. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1215. err:
  1216. return retval;
  1217. }
  1218. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1219. {
  1220. if (dev->vpd && dev->vpd->attr) {
  1221. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1222. kfree(dev->vpd->attr);
  1223. }
  1224. pcie_aspm_remove_sysfs_dev_files(dev);
  1225. if (dev->reset_fn) {
  1226. device_remove_file(&dev->dev, &reset_attr);
  1227. dev->reset_fn = 0;
  1228. }
  1229. }
  1230. /**
  1231. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1232. * @pdev: device whose entries we should free
  1233. *
  1234. * Cleanup when @pdev is removed from sysfs.
  1235. */
  1236. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1237. {
  1238. int rom_size = 0;
  1239. if (!sysfs_initialized)
  1240. return;
  1241. pci_remove_capabilities_sysfs(pdev);
  1242. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1243. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1244. else
  1245. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1246. pci_remove_resource_files(pdev);
  1247. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1248. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1249. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1250. rom_size = 0x20000;
  1251. if (rom_size && pdev->rom_attr) {
  1252. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1253. kfree(pdev->rom_attr);
  1254. }
  1255. pci_remove_firmware_label_files(pdev);
  1256. }
  1257. static int __init pci_sysfs_init(void)
  1258. {
  1259. struct pci_dev *pdev = NULL;
  1260. int retval;
  1261. sysfs_initialized = 1;
  1262. for_each_pci_dev(pdev) {
  1263. retval = pci_create_sysfs_dev_files(pdev);
  1264. if (retval) {
  1265. pci_dev_put(pdev);
  1266. return retval;
  1267. }
  1268. }
  1269. return 0;
  1270. }
  1271. late_initcall(pci_sysfs_init);
  1272. static struct attribute *pci_dev_dev_attrs[] = {
  1273. &vga_attr.attr,
  1274. NULL,
  1275. };
  1276. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1277. struct attribute *a, int n)
  1278. {
  1279. struct device *dev = container_of(kobj, struct device, kobj);
  1280. struct pci_dev *pdev = to_pci_dev(dev);
  1281. if (a == &vga_attr.attr)
  1282. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1283. return 0;
  1284. return a->mode;
  1285. }
  1286. static struct attribute *pci_dev_hp_attrs[] = {
  1287. &dev_remove_attr.attr,
  1288. &dev_rescan_attr.attr,
  1289. NULL,
  1290. };
  1291. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1292. struct attribute *a, int n)
  1293. {
  1294. struct device *dev = container_of(kobj, struct device, kobj);
  1295. struct pci_dev *pdev = to_pci_dev(dev);
  1296. if (pdev->is_virtfn)
  1297. return 0;
  1298. return a->mode;
  1299. }
  1300. static struct attribute_group pci_dev_hp_attr_group = {
  1301. .attrs = pci_dev_hp_attrs,
  1302. .is_visible = pci_dev_hp_attrs_are_visible,
  1303. };
  1304. #ifdef CONFIG_PCI_IOV
  1305. static struct attribute *sriov_dev_attrs[] = {
  1306. &sriov_totalvfs_attr.attr,
  1307. &sriov_numvfs_attr.attr,
  1308. NULL,
  1309. };
  1310. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1311. struct attribute *a, int n)
  1312. {
  1313. struct device *dev = container_of(kobj, struct device, kobj);
  1314. if (!dev_is_pf(dev))
  1315. return 0;
  1316. return a->mode;
  1317. }
  1318. static struct attribute_group sriov_dev_attr_group = {
  1319. .attrs = sriov_dev_attrs,
  1320. .is_visible = sriov_attrs_are_visible,
  1321. };
  1322. #endif /* CONFIG_PCI_IOV */
  1323. static struct attribute_group pci_dev_attr_group = {
  1324. .attrs = pci_dev_dev_attrs,
  1325. .is_visible = pci_dev_attrs_are_visible,
  1326. };
  1327. static const struct attribute_group *pci_dev_attr_groups[] = {
  1328. &pci_dev_attr_group,
  1329. &pci_dev_hp_attr_group,
  1330. #ifdef CONFIG_PCI_IOV
  1331. &sriov_dev_attr_group,
  1332. #endif
  1333. NULL,
  1334. };
  1335. struct device_type pci_dev_type = {
  1336. .groups = pci_dev_attr_groups,
  1337. };