 Ville Syrjälä
|
9f9d594d95
drm/i915: Fix ICL+ HDMI clock readout
|
7 lat temu |
 Manasi Navare
|
bcaad53297
drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
|
7 lat temu |
 Anusha Srivatsa
|
2b7edeb008
drm/i915/icl: Add TBT checks for PLL calculations
|
7 lat temu |
 Rodrigo Vivi
|
c74a7469f9
Merge drm/drm-next into drm-intel-next-queued
|
7 lat temu |
 Paulo Zanoni
|
f7a738fca0
drm/i915/icl: compute the TBT PLL registers
|
7 lat temu |
 Dave Airlie
|
539c475dad
Merge tag 'drm-intel-next-2018-07-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
|
7 lat temu |
 Gustavo A. R. Silva
|
f0d759f038
drm/i915: Mark expected switch fall-throughs
|
7 lat temu |
|
Ville Syrjälä
|
40560e26dc
drm/i915: Use drm_plane_mask() & co.
|
7 lat temu |
 Imre Deak
|
bd99ce085f
drm/i915/icl: Do read-modify-write as needed during MG PLL programming
|
7 lat temu |
|
Imre Deak
|
9fc59bae0f
drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz
|
7 lat temu |
|
Paulo Zanoni
|
1fa11ee2d9
drm/i915/icl: start adding the TBT pll
|
7 lat temu |
|
Manasi Navare
|
51c83cfaf9
drm/i915/icl: Get DDI clock for ICL based on PLLs.
|
7 lat temu |
|
Paulo Zanoni
|
145ef0d17d
drm/i915/icl: compute the MG PLL registers
|
7 lat temu |
|
Paulo Zanoni
|
bb82139b4b
drm/i915/icl: compute the combo PHY (DPLL) DP registers
|
7 lat temu |
|
Paulo Zanoni
|
febafb9318
drm/i915/icl: compute the combo PHY (DPLL) HDMI registers
|
7 lat temu |
|
Paulo Zanoni
|
c27e917e2b
drm/i915/icl: add basic support for the ICL clocks
|
7 lat temu |
 Lucas De Marchi
|
7fd9e82993
drm/i915: reorder dpll_info members
|
7 lat temu |
|
Lucas De Marchi
|
5cd281f679
drm/i915: use flags from dpll_info embedded in intel_shared_dpll
|
7 lat temu |
|
Lucas De Marchi
|
0823eb9c52
drm/i915: use id from intel_shared_dpll.info
|
7 lat temu |
|
Lucas De Marchi
|
72f775fa28
drm/i915: use name from intel_shared_dpll.info
|
7 lat temu |
|
Lucas De Marchi
|
ee1398ba01
drm/i915: use funcs from intel_shared_dpll.info
|
7 lat temu |
|
Lucas De Marchi
|
e30379637f
drm/i915: add dpll_info inside intel_shared_dpll
|
7 lat temu |
|
Lucas De Marchi
|
47aa1e73e7
drm/i915: move dpll_info to header
|
7 lat temu |
|
Rodrigo Vivi
|
8a00678a09
drm/i915/cnl: Simplify dco_fraction calculation.
|
7 lat temu |
|
Rodrigo Vivi
|
cacf6fe7c6
drm/i915/cnl: Don't blindly replace qdiv.
|
7 lat temu |
|
Rodrigo Vivi
|
063c886197
drm/i915/cnl: Fix wrpll math for higher freqs.
|
7 lat temu |
|
Rodrigo Vivi
|
5eca81de88
drm/i915/cnl: Fix, simplify and unify wrpll variable sizes.
|
7 lat temu |
|
Rodrigo Vivi
|
ecc2069a02
drm/i915/cnl: Remove useless conversion.
|
7 lat temu |
|
Rodrigo Vivi
|
ec2f343e72
drm/i915/cnl: Remove spurious central_freq.
|
7 lat temu |
|
Ville Syrjälä
|
005b5bc694
drm/i915: Replace dig_port->port with encoder port for BXT DPLL selection
|
7 lat temu |
