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@@ -2198,11 +2198,11 @@ static void cnl_wrpll_params_populate(struct skl_wrpll_params *params, uint32_t
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}
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static bool
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-cnl_ddi_calculate_wrpll(int clock /* in Hz */,
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+cnl_ddi_calculate_wrpll(int clock,
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struct drm_i915_private *dev_priv,
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struct skl_wrpll_params *wrpll_params)
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{
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- uint64_t afe_clock = clock * 5 / KHz(1); /* clocks in kHz */
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+ uint64_t afe_clock = clock * 5;
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unsigned int dco_min = 7998 * KHz(1);
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unsigned int dco_max = 10000 * KHz(1);
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unsigned int dco_mid = (dco_min + dco_max) / 2;
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@@ -2255,7 +2255,7 @@ static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc,
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cfgcr0 = DPLL_CFGCR0_HDMI_MODE;
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- if (!cnl_ddi_calculate_wrpll(clock * 1000, dev_priv, &wrpll_params))
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+ if (!cnl_ddi_calculate_wrpll(clock, dev_priv, &wrpll_params))
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return false;
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cfgcr0 |= DPLL_CFGCR0_DCO_FRACTION(wrpll_params.dco_fraction) |
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