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Commit History

Author SHA1 Message Date
  Moritz Fischer 28f98a12f7 fpga: zynq-fpga: Fix issue with drvdata being overwritten. 9 years ago
  Moritz Fischer 4d10eaff5b fpga: zynq-fpga: Change fw format to handle bin instead of bit. 9 years ago
  Moritz Fischer 6376931bab fpga: zynq-fpga: Fix unbalanced clock handling 9 years ago
  Moritz Fischer 37784706bf fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 9 years ago