Commit History

Autor SHA1 Mensaxe Data
  Moritz Fischer 28f98a12f7 fpga: zynq-fpga: Fix issue with drvdata being overwritten. %!s(int64=9) %!d(string=hai) anos
  Moritz Fischer 4d10eaff5b fpga: zynq-fpga: Change fw format to handle bin instead of bit. %!s(int64=9) %!d(string=hai) anos
  Moritz Fischer 6376931bab fpga: zynq-fpga: Fix unbalanced clock handling %!s(int64=9) %!d(string=hai) anos
  Moritz Fischer 37784706bf fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 %!s(int64=9) %!d(string=hai) anos