Commit History

Author SHA1 Message Date
  Maxime Ripard c34eda69ad mmc: sunxi: Reset the device at probe time 8 years ago
  Chen-Yu Tsai 082bb85fbf mmc: sunxi: Fix clock rate passed to sunxi_mmc_clk_set_phase 8 years ago
  Icenowy Zheng b939e0b73e mmc: sunxi: fix support for new timings mode only SoCs 8 years ago
  Chen-Yu Tsai a646113435 mmc: sunxi: Fix NULL pointer reference on clk_delays 8 years ago
  Chen-Yu Tsai ac98caefe1 mmc: sunxi: Add support for A83T eMMC (MMC2) 8 years ago
  Chen-Yu Tsai c903a2ae54 mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode 8 years ago
  Chen-Yu Tsai ff39e7f742 mmc: sunxi: Support controllers that can use both old and new timings 8 years ago
  Julia Lawall 1f8029c3a1 mmc: sunxi: constify mmc_host_ops structures 8 years ago
  Philipp Zabel 5e40ddacfb mmc: sunxi: explicitly request exclusive reset control 8 years ago
  Chen-Yu Tsai 26cb2be4c7 mmc: sunxi: Keep default timing phase settings for new timing mode 8 years ago
  Heiner Kallweit feeef096a7 mmc: use new core function mmc_get_dma_dir 8 years ago
  Icenowy Zheng bd675698e8 mmc: sunxi: change controller error info to debug level 8 years ago
  Maxime Ripard 43c15e962c mmc: sunxi: Add more debug informations 8 years ago
  Maxime Ripard 4fb3ce07ea mmc: sunxi: Add EMMC (MMC2) controller compatible 8 years ago
  Maxime Ripard 16e821e3ba mmc: sunxi: Mask DATA0 when updating the clock 8 years ago
  Maxime Ripard 9a37e53e45 mmc: sunxi: Enable the new timings for the A64 MMC controllers 8 years ago
  Maxime Ripard 860fdf89b9 mmc: sunxi: Always set signal delay to 0 for A64 8 years ago
  Maxime Ripard 9479074e93 mmc: sunxi: Gate the clock when rate is 0 8 years ago
  Maxime Ripard 39cc281fb7 mmc: sunxi: Fix clock frequency change sequence 8 years ago
  Maxime Ripard 424feb59d8 mmc: sunxi: Prevent against null dereference for vmmc 9 years ago
  Icenowy Zheng e1b8dfd1b1 mmc: sunxi: add support for A64 mmc controller 9 years ago
  Michael Weiser 2dd110b27d mmc: sunxi-mmc: change idma descriptor to __le32 9 years ago
  Jean-Francois Moine 63311bece0 mmc: sunxi: Check the value returned by clk_round_rate 9 years ago
  Hans de Goede b465646ef4 mmc: sunxi: sun4i / sun5i do not have sample clocks 9 years ago
  Hans de Goede f2cecb7094 mmc: sunxi: Factor out clock phase setting code into a helper function 9 years ago
  Hans de Goede 86a93317ed mmc: sunxi: Introduce a sunxi_mmc_cfg struct 9 years ago
  Hans de Goede 4c5f4bf412 mmc: sunxi: Disable sample clks on remove 9 years ago
  Chen-Yu Tsai afefc102df mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 9 years ago
  Chen-Yu Tsai 0175249efa mmc: sunxi: Fix DDR MMC timings for A80 9 years ago
  Chen-Yu Tsai 2963070a0f mmc: sunxi: Disable eMMC HS-DDR (MMC_CAP_1_8V_DDR) for Allwinner A80 9 years ago