 Paulo Zanoni
|
9378985eb0
drm/i915/icl: implement DVFS for ICL
|
7 years ago |
|
Paulo Zanoni
|
1fa11ee2d9
drm/i915/icl: start adding the TBT pll
|
7 years ago |
 Imre Deak
|
c737376442
drm/i915/ddi: Set HDMI infoframes with pipe clocks enabled
|
7 years ago |
|
Imre Deak
|
afb2c4437d
drm/i915/ddi: Push pipe clock enabling to encoders
|
7 years ago |
 Manasi Navare
|
dccc7228b5
drm/i915/icl: Add DDI HDMI level selection for ICL
|
7 years ago |
 Arkadiusz Hiler
|
5428bf5a9a
drm/i915/icl: Calculate link clock using the new registers
|
7 years ago |
|
Manasi Navare
|
51c83cfaf9
drm/i915/icl: Get DDI clock for ICL based on PLLs.
|
7 years ago |
 Mahesh Kumar
|
c46ef57d20
drm/i915/icl: fix icl_unmap/map_plls_to_ports
|
7 years ago |
 Ville Syrjälä
|
f606bc6d9d
drm/i915: Move intel_ddi_get_crtc_new_encoder() out from ddi code
|
7 years ago |
|
Ville Syrjälä
|
4718a365cf
drm/i915: Use the same vswing->max_preemph mapping on HSW/BDW as on SKL+
|
7 years ago |
|
Paulo Zanoni
|
c27e917e2b
drm/i915/icl: add basic support for the ICL clocks
|
7 years ago |
|
Manasi Navare
|
36cf89f53b
drm/i915/icl: Fix the DP Max Voltage for ICL
|
7 years ago |
|
Manasi Navare
|
fb5c8e9d43
drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI
|
7 years ago |
 Lyude Paul
|
be1c63c801
drm/i915/dp: Send DPCD ON for MST before phy_up
|
7 years ago |
 Lucas De Marchi
|
0823eb9c52
drm/i915: use id from intel_shared_dpll.info
|
7 years ago |
|
Manasi Navare
|
cd96bea7ba
drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer
|
7 years ago |
|
Manasi Navare
|
19b904f8df
drm/i915/icl: Add Combo PHY DDI Buffer translation tables for Icelake.
|
7 years ago |
|
Ville Syrjälä
|
277ab5abc6
drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails
|
7 years ago |
 Dhinakaran Pandiyan
|
ad260ab32a
drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.
|
7 years ago |
 Jani Nikula
|
1e6aa7e55c
drm/i915/icl: do not save DDI A/E sharing bit for ICL
|
7 years ago |
|
Ville Syrjälä
|
edb2e5301c
drm/i915: Track whether the DP link is trained or not
|
7 years ago |
|
Ville Syrjälä
|
c85d200e83
drm/i915: Move SST DP link retraining into the ->post_hotplug() hook
|
7 years ago |
|
Ville Syrjälä
|
dba14b27dd
drm/i915: Reinitialize sink scrambling/TMDS clock ratio on HPD
|
7 years ago |
|
Mahesh Kumar
|
3d2011cfa4
drm/i915/icl: remove port A/E lane sharing limitation.
|
7 years ago |
 Dave Airlie
|
f073d78eeb
Merge tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
|
7 years ago |
|
Dave Airlie
|
933519a5a2
Merge tag 'topic/hdcp-2018-02-13' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
|
7 years ago |
 Tvrtko Ursulin
|
c56b89f16d
drm/i915: Use INTEL_GEN everywhere
|
7 years ago |
 Rodrigo Vivi
|
9787e835fa
drm/i915/cnl: Enable DDI-F on Cannonlake.
|
7 years ago |
|
Ville Syrjälä
|
0519c102f5
drm/i915: Implement display w/a #1143
|
7 years ago |
 Sean Paul
|
2320175feb
drm/i915: Implement HDCP for HDMI
|
7 years ago |
