Commit History

Autor SHA1 Mensaxe Data
  Sean Paul 93396d0f9c drm/tegra: dc: Select root window for event dispatch %!s(int64=10) %!d(string=hai) anos
  Thierry Reding 6b59cc1c86 drm/tegra: dc: Fix a potential race on page-flip completion %!s(int64=10) %!d(string=hai) anos
  Thierry Reding ed7dae58de drm/tegra: dc: Consistently use the same pipe %!s(int64=10) %!d(string=hai) anos
  Dave Airlie e8115e79aa Merge tag 'v3.18-rc7' into drm-next %!s(int64=10) %!d(string=hai) anos
  Dave Airlie b0654103f5 Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next %!s(int64=10) %!d(string=hai) anos
  Thierry Reding c7679306a9 drm/tegra: dc: Universal plane support %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 03a6056976 drm/tegra: dc: Registers are 32 bits wide %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 205d48edee drm/tegra: dc: Factor out DC, window and cursor commit %!s(int64=11) %!d(string=hai) anos
  Thierry Reding df06b759f2 drm/tegra: Add IOMMU support %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 9c0127004f drm/tegra: dc: Add powergate support %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 8ff64c17f3 drm/tegra: dc: Add missing call to drm_vblank_on() %!s(int64=11) %!d(string=hai) anos
  Daniel Vetter 3cb9ae4fd8 drm: Move drm_crtc_init from drm_crtc.h to drm_plane_helper.h %!s(int64=11) %!d(string=hai) anos
  Stephen Warren ef70728c7a drm/tegra: add MODULE_DEVICE_TABLEs %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 5482d75a65 drm/tegra: dc - Reset controller on driver remove %!s(int64=11) %!d(string=hai) anos
  Thierry Reding d1f3e1e0b3 drm/tegra: Properly align stride for framebuffers %!s(int64=11) %!d(string=hai) anos
  Thierry Reding c134f019ab drm/tegra: Implement more tiling modes %!s(int64=11) %!d(string=hai) anos
  Thierry Reding e687651bc1 drm/tegra: Add hardware cursor support %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 9910f5c455 drm/tegra: Remove host1x drm_bus implementation %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 91eded9b48 drm/tegra: dc - Compute shift clock divider in output drivers %!s(int64=11) %!d(string=hai) anos
  Thierry Reding dbb3f2f751 drm/tegra: dc - Move around shift clock programming %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 0444c0ff3c drm/tegra: dc - Use proper H/V ref-to-sync values %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 501bcbd1b2 drm/tegra: dc - Do not touch power control register %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 10288eea88 drm/tegra: dc - Reshuffle code to get rid of prototypes %!s(int64=11) %!d(string=hai) anos
  Thierry Reding eba66501ac drm/tegra: dc - Rename INVERT_V to V_DIRECTION %!s(int64=11) %!d(string=hai) anos
  Thierry Reding f925390efc drm/tegra: dc - Add YUYV support %!s(int64=11) %!d(string=hai) anos
  Daniel Vetter 2b4c36612e drm/tegra: restrict plane loops to legacy planes %!s(int64=11) %!d(string=hai) anos
  Matt Roper f4510a2752 drm: Replace crtc fb with primary plane fb (v3) %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 13411ddd31 drm/tegra: Obtain head number from DT %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 72d3028615 drm/tegra: Relocate some output-specific code %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 8620fc629a drm/tegra: Add Tegra124 DC support %!s(int64=11) %!d(string=hai) anos