 Robert Bragg
|
a941795a3a
drm/i915: rename OACONTROL GEN7_OACONTROL
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9 years ago |
 Jani Nikula
|
955c1dd15d
drm/i915/gvt: drop checks for early Skylake revisions
|
8 years ago |
 Ping Gao
|
a045fba47d
drm/i915/gvt: add more MMIO regs with command access flag
|
8 years ago |
|
Ping Gao
|
4f3f1aed4b
drm/i915/gvt: emulate right behavior for tlb_control
|
8 years ago |
 Du, Changbin
|
2fb39fad06
drm/i915/gvt: emulate vgpu engine reset control behavior
|
9 years ago |
|
Ping Gao
|
d4362225e8
drm/i915/gvt: update misc ctl regs base on stepping info
|
9 years ago |
|
Ping Gao
|
f24940e000
drm/i915/gvt: correct the emulation in TLB control handler
|
9 years ago |
|
Ping Gao
|
5f399f1158
drm/i915/gvt: add write vreg in MMIO DMA_CTRL handler
|
9 years ago |
 Bing Niu
|
6fb5082a8c
drm/i915/gvt: throw error basing on execlist submit result
|
9 years ago |
|
Ping Gao
|
23736d1b1b
drm/i915/gvt: add full vGPU reset support
|
9 years ago |
|
Ping Gao
|
0a8b66e3ad
drm/i915/gvt: correct the reset logic
|
9 years ago |
|
Ping Gao
|
40d2428b3a
drm/i915/gvt: add vreg write for GDRST handler
|
9 years ago |
 Zhenyu Wang
|
0fac21e7e9
drm/i915/gvt: properly access enabled intel_engine_cs
|
9 years ago |
|
Zhenyu Wang
|
feddf6e866
drm/i915/gvt: clean up intel_gvt.h as interface for i915 core
|
9 years ago |
|
Zhenyu Wang
|
1140f9ed05
drm/i915/gvt: Fix build failure after intel_engine_cs change
|
9 years ago |
 Zhi Wang
|
1786571393
drm/i915/gvt: vGPU context switch
|
9 years ago |
|
Zhi Wang
|
4b63960ebd
drm/i915/gvt: vGPU schedule policy framework
|
9 years ago |
|
Zhi Wang
|
e473405783
drm/i915/gvt: vGPU workload scheduler
|
9 years ago |
|
Zhi Wang
|
28c4c6ca7f
drm/i915/gvt: vGPU workload submission
|
9 years ago |
|
Zhi Wang
|
04d348ae3f
drm/i915/gvt: vGPU display virtualization
|
9 years ago |
|
Zhi Wang
|
e39c5add32
drm/i915/gvt: vGPU MMIO virtualization
|
9 years ago |
|
Zhi Wang
|
12d14cc43b
drm/i915/gvt: Introduce a framework for tracking HW registers.
|
9 years ago |
