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@@ -1320,7 +1320,7 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
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struct intel_vgpu_execlist *execlist;
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u32 data = *(u32 *)p_data;
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- int ret;
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+ int ret = 0;
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if (WARN_ON(ring_id < 0 || ring_id > I915_NUM_ENGINES - 1))
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return -EINVAL;
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@@ -1328,12 +1328,15 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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execlist = &vgpu->execlist[ring_id];
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execlist->elsp_dwords.data[execlist->elsp_dwords.index] = data;
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- if (execlist->elsp_dwords.index == 3)
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+ if (execlist->elsp_dwords.index == 3) {
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ret = intel_vgpu_submit_execlist(vgpu, ring_id);
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+ if(ret)
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+ gvt_err("fail submit workload on ring %d\n", ring_id);
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+ }
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++execlist->elsp_dwords.index;
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execlist->elsp_dwords.index &= 0x3;
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- return 0;
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+ return ret;
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}
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static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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