 Eric Anholt
|
3f9195811d
clk: bcm2835: Add leaf clock measurement support, disabled by default
|
8 lat temu |
|
Eric Anholt
|
8a39e9fa57
clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
|
8 lat temu |
|
Eric Anholt
|
55486091bd
clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.
|
8 lat temu |
 Boris Brezillon
|
2aab7a2055
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
|
8 lat temu |
|
Boris Brezillon
|
d86d46af84
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
|
8 lat temu |
|
Boris Brezillon
|
155e8b3b0e
clk: bcm: Support rate change propagation on bcm2835 clocks
|
8 lat temu |
|
Boris Brezillon
|
68af4fa8f3
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
|
8 lat temu |
|
Boris Brezillon
|
f2a46926ab
clk: bcm2835: Fix ->fixed_divider of pllh_aux
|
8 lat temu |
|
Eric Anholt
|
c4e634ce41
clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.
|
9 lat temu |
 Stephen Boyd
|
b19f009d45
clk: bcm2835: Migrate to clk_hw based registration and OF APIs
|
9 lat temu |
|
Eric Anholt
|
67615c588a
clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent
|
9 lat temu |
|
Eric Anholt
|
9e400c5cc5
clk: bcm2835: Mark the CM SDRAM clock's parent as critical
|
9 lat temu |
|
Eric Anholt
|
eddcbe8398
clk: bcm2835: Mark GPIO clocks enabled at boot as critical
|
9 lat temu |
|
Eric Anholt
|
e69fdcca83
clk: bcm2835: Mark the VPU clock as critical
|
9 lat temu |
|
Eric Anholt
|
e708b383f4
clk: bcm2835: Fix PLL poweron
|
9 lat temu |
|
Eric Anholt
|
286259ef4b
clk: bcm2835: Fix compiler warnings on 64-bit builds
|
9 lat temu |
 Martin Sperl
|
d3d6f15fd3
clk: bcm2835: add missing osc and per clocks
|
9 lat temu |
|
Martin Sperl
|
728436956a
clk: bcm2835: add missing PLL clock dividers
|
9 lat temu |
|
Martin Sperl
|
33b689600f
clk: bcm2835: enable management of PCM clock
|
9 lat temu |
|
Martin Sperl
|
3b15afefbe
clk: bcm2835: reorganize bcm2835_clock_array assignment
|
9 lat temu |
|
Martin Sperl
|
56eb3a2ed9
clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver
|
9 lat temu |
|
Martin Sperl
|
96bf9c69d5
clk: bcm2835: expose raw clock-registers via debugfs
|
9 lat temu |
|
Martin Sperl
|
6e1e60dace
clk: bcm2835: clean up coding style issues
|
9 lat temu |
|
Martin Sperl
|
959ca92a32
clk: bcm2835: correctly enable fractional clock support
|
9 lat temu |
|
Martin Sperl
|
997f16bd5d
clk: bcm2835: divider value has to be 1 or more
|
9 lat temu |
|
Martin Sperl
|
ec36a5c668
clk: bcm2835: add locking to pll*_on/off methods
|
9 lat temu |
|
Martin Sperl
|
6727f086cf
clk: bcm2835: pll_off should only update CM_PLL_ANARST
|
9 lat temu |
 Stephen Boyd
|
bd41aa6773
clk: bcm: Remove CLK_IS_ROOT
|
9 lat temu |
|
Martin Sperl
|
2103a21561
clk: bcm2835: added missing clock register definitions
|
9 lat temu |
|
Eric Anholt
|
79c1e2fc2c
clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()
|
9 lat temu |
