 Jon Hunter
|
1116d5a7af
clk: tegra: Don't reset PLL-CX if it is already enabled
|
8 years ago |
 Peter De Schrijver
|
88da44c5ed
clk: tegra: Add missing Tegra210 clocks
|
8 years ago |
|
Peter De Schrijver
|
bea1baa1e7
clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on
|
8 years ago |
|
Peter De Schrijver
|
59af78d78d
clk: tegra: Add SATA seq input control
|
8 years ago |
|
Peter De Schrijver
|
68d724cedc
clk: tegra: Add Tegra210 special resets
|
8 years ago |
|
Peter De Schrijver
|
e745f992cf
clk: tegra: Rework pll_u
|
8 years ago |
|
Peter De Schrijver
|
3843832fc8
clk: tegra: Handle UTMIPLL IDDQ
|
8 years ago |
|
Peter De Schrijver
|
24c3ebef1a
clk: tegra: Add aclk
|
8 years ago |
|
Peter De Schrijver
|
6cfc8bc9ee
clk: tegra: Define Tegra210 DMIC clocks
|
8 years ago |
|
Peter De Schrijver
|
319af7975c
clk: tegra: Define Tegra210 DMIC sync clocks
|
8 years ago |
|
Peter De Schrijver
|
bfa34832df
clk: tegra: Add CEC clock
|
8 years ago |
|
Peter De Schrijver
|
ef6ed2b956
clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation
|
8 years ago |
|
Peter De Schrijver
|
8dce89a1c2
clk: tegra: Don't warn for PLL defaults unnecessarily
|
8 years ago |
|
Peter De Schrijver
|
8809eeac21
clk: tegra: Remove non-existing pll_m_out1 clock
|
8 years ago |
|
Peter De Schrijver
|
34ac2c278b
clk: tegra: Fix ISP clock modelling
|
8 years ago |
|
Peter De Schrijver
|
9326947f22
clk: tegra: Fix pll_a1 iddq register, add pll_a1
|
8 years ago |
 Andrew Bresticker
|
15d68e8c2e
clk: tegra: Initialize UTMI PLL when enabling PLLU
|
9 years ago |
 Thierry Reding
|
74d3ba0b6f
clk: tegra: Micro-optimize Tegra210 clock setup
|
9 years ago |
|
Thierry Reding
|
2e34c2ac16
clk: tegra: Make sor_safe the parent of dpaux and dpaux1
|
9 years ago |
|
Thierry Reding
|
e452b818db
clk: tegra: Enable sor1 and sor1_src on Tegra210
|
9 years ago |
|
Thierry Reding
|
e2f716561b
clk: tegra: Disable spread spectrum on pll_d2
|
10 years ago |
|
Thierry Reding
|
eddb65e7fd
clk: tegra: Fixup post dividers on Tegra210
|
9 years ago |
 Arnd Bergmann
|
287980e49f
remove lots of IS_ERR_VALUE abuses
|
9 years ago |
 Rhyland Klein
|
926655f929
clk: tegra: Fix pllre Tegra210 and add pll_re_out1
|
9 years ago |
|
Thierry Reding
|
a91bb605ec
clk: tegra: Add sor_safe clock
|
10 years ago |
|
Thierry Reding
|
eede7113aa
clk: tegra: dpaux and dpaux1 are fixed factor clocks
|
10 years ago |
|
Thierry Reding
|
98c4b3661b
clk: tegra: Add dpaux1 clock
|
10 years ago |
|
Andrew Bresticker
|
3358d2d9f4
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
|
10 years ago |
|
Jon Hunter
|
fd360e2084
clk: tegra: Fix sparse warnings for functions not declared as static
|
9 years ago |
|
Jon Hunter
|
d9e657919a
clk: tegra: Fix sparse warning for pll_m
|
9 years ago |
