 Andrew Bresticker
|
15d68e8c2e
clk: tegra: Initialize UTMI PLL when enabling PLLU
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9 سال پیش |
 Thierry Reding
|
eede7113aa
clk: tegra: dpaux and dpaux1 are fixed factor clocks
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10 سال پیش |
 Rhyland Klein
|
86c679a522
clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate
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10 سال پیش |
|
Rhyland Klein
|
3706b43629
clk: tegra: pll: Don't unconditionally set LOCK flags
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10 سال پیش |
|
Thierry Reding
|
385f9adf62
clk: tegra: Constify pdiv-to-hw mappings
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9 سال پیش |
|
Thierry Reding
|
8d99704fde
clk: tegra: Format tables consistently
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9 سال پیش |
|
Thierry Reding
|
e52d7c04bb
clk: tegra: Miscellaneous coding style cleanups
|
9 سال پیش |
|
Thierry Reding
|
c4947e364b
clk: tegra: Fix 26 MHz oscillator frequency
|
9 سال پیش |
|
Rhyland Klein
|
88d909bedf
clk: tegra: Modify tegra_audio_clk_init to accept more plls
|
10 سال پیش |
 Stephen Boyd
|
c5a132a84a
clk: tegra: Fix some static checker problems
|
10 سال پیش |
|
Stephen Boyd
|
a7c602bf42
Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
|
10 سال پیش |
|
Stephen Boyd
|
584ac4e935
clk: tegra: Properly include clk.h
|
10 سال پیش |
 Tuomas Tynkkynen
|
c38864a703
clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend
|
10 سال پیش |
 Paul Walmsley
|
a3c83ff20c
clk: tegra: Add DFLL DVCO reset control for Tegra124
|
10 سال پیش |
 Tomeu Vizoso
|
ac67477f8f
clk: tegra: Set the EMC clock as the parent of the MC clock
|
10 سال پیش |
 Mikko Perttunen
|
2db04f16b5
clk: tegra: Add EMC clock driver
|
10 سال پیش |
|
Mikko Perttunen
|
374ffadaf3
clk: tegra: Remove old Tegra124 EMC clock
|
10 سال پیش |
|
Thierry Reding
|
c1d676cec5
clk: tegra: Use the proper parent for plld_dsi
|
10 سال پیش |
|
Thierry Reding
|
63cc5a4da1
clk: tegra: Model oscillator as clock
|
10 سال پیش |
 Dylan Reid
|
04794d982e
clk: tegra: Enable HDA to HDMI clocks on Tegra124
|
11 سال پیش |
 Mark Zhang
|
b270491eb9
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
|
10 سال پیش |
|
Paul Walmsley
|
08acae34e8
clk: tegra: Add support for the Tegra132 CAR IP block
|
10 سال پیش |
 Sean Paul
|
f892f24b37
clk: tegra124: Add init data for dsi lp clocks
|
11 سال پیش |
|
Thierry Reding
|
4f4f85fa0b
clk: tegra: Implement memory-controller clock
|
11 سال پیش |
|
Mikko Perttunen
|
4c495c204f
clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks
|
11 سال پیش |
 Peter De Schrijver
|
0a7eec7f59
clk: tegra124: init table updates
|
11 سال پیش |
|
Mikko Perttunen
|
cb44cc2f48
clk: tegra: Add SATA clocks to Tegra124 initialization table
|
11 سال پیش |
|
Peter De Schrijver
|
167d5366c4
clk: tegra: fix vi_sensor clocks on Tegra124
|
11 سال پیش |
|
Andrew Bresticker
|
4a7f10d67b
clk: tegra: Initialize xusb clocks
|
11 سال پیش |
|
Andrew Bresticker
|
5c992afcf8
clk: tegra: Fix xusb_hs_src clock hierarchy
|
11 سال پیش |
