 Dinh Nguyen
|
5343325ff3
clk: socfpga: add a clock driver for the Arria 10 platform
|
%!s(int64=10) %!d(string=hai) anos |
 Dinh Nguyen
|
a30d27ed73
clk: socfpga: fix clock driver for 3.15
|
%!s(int64=11) %!d(string=hai) anos |
|
Dinh Nguyen
|
95bb9f515f
clk: socfpga: Fix section mismatch warning
|
%!s(int64=11) %!d(string=hai) anos |
 Steffen Trumtrar
|
97259e99bd
clk: socfpga: split clk code
|
%!s(int64=11) %!d(string=hai) anos |
|
Steffen Trumtrar
|
0c5a1872ba
clk: socfpga: fix define typo
|
%!s(int64=11) %!d(string=hai) anos |
|
Steffen Trumtrar
|
ef5043c2d9
clk: socfpga: remove unused field
|
%!s(int64=11) %!d(string=hai) anos |
|
Dinh Nguyen
|
77f1057777
clk: socfpga: Remove socfpga_init_clocks
|
%!s(int64=11) %!d(string=hai) anos |
|
Dinh Nguyen
|
b7cec13f08
clk: socfpga: Look for the GPIO_DB_CLK by its offset
|
%!s(int64=11) %!d(string=hai) anos |
|
Dinh Nguyen
|
6a7e71221d
clk: socfpga: Map the clk manager base address in the clock driver
|
%!s(int64=11) %!d(string=hai) anos |
 Sachin Kamat
|
6d7ff6cc9c
clk: socfpga: Use NULL instead of 0
|
%!s(int64=12) %!d(string=hai) anos |
|
Dinh Nguyen
|
4d04391cfe
clk: socfpga: Remove check for "reg" property in socfpga_clk_init
|
%!s(int64=11) %!d(string=hai) anos |
|
Dinh Nguyen
|
79a2e99889
clk: socfpga: Fix incorrect sdmmc clock name
|
%!s(int64=12) %!d(string=hai) anos |
|
Dinh Nguyen
|
825f0c2672
ARM: socfpga: Add support to gate peripheral clocks
|
%!s(int64=12) %!d(string=hai) anos |
|
Dinh Nguyen
|
56c5c13f70
ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries
|
%!s(int64=12) %!d(string=hai) anos |
|
Dinh Nguyen
|
66314223aa
ARM: socfpga: initial support for Altera's SOCFPGA platform
|
%!s(int64=13) %!d(string=hai) anos |
