 Al Viro
|
b4b8664d29
arm64: don't pull uaccess.h into *.S
|
8 anni fa |
 Linus Torvalds
|
7c0f6ba682
Replace <asm/uaccess.h> with <linux/uaccess.h> globally
|
8 anni fa |
 Catalin Marinas
|
39bc88e5e3
arm64: Disable TTBR0_EL1 during normal kernel execution
|
9 anni fa |
 Kwangwoo Lee
|
d34fdb7081
arm64: mm: convert __dma_* routines to use start, size
|
9 anni fa |
 Andre Przywara
|
290622efc7
arm64: fix "dc cvau" cache operation on errata-affected core
|
9 anni fa |
 Geoff Levand
|
7b7293ae3d
arm64: Fold proc-macros.S into assembler.h
|
9 anni fa |
 Ashok Kumar
|
0a28714c53
arm64: Use PoU cache instr for I/D coherency
|
9 anni fa |
 Ard Biesheuvel
|
207918461e
arm64: use ENDPIPROC() to annotate position independent assembler routines
|
9 anni fa |
 Daniel Thompson
|
271d35eb77
arm64: mm: Adopt new alternative assembler macros
|
10 anni fa |
 Marc Zyngier
|
8d883b23ae
arm64: alternative: Merge alternative-asm.h into alternative.h
|
10 anni fa |
 Mark Rutland
|
68234df4ea
arm64: kill flush_cache_all()
|
10 anni fa |
 Vladimir Murzin
|
a2d25a5391
arm64: compat: align cacheflush syscall with arch/arm
|
10 anni fa |
|
Andre Przywara
|
301bcfac42
arm64: add Cortex-A53 cache errata workaround
|
10 anni fa |
 Will Deacon
|
dc60b777fc
arm64: mm: use inner-shareable barriers for inner-shareable maintenance
|
11 anni fa |
|
Catalin Marinas
|
ebf81a938d
arm64: Fix DMA range invalidation for cache line unaligned buffers
|
11 anni fa |
|
Catalin Marinas
|
c218bca74e
arm64: Relax the kernel cache requirements for boot
|
11 anni fa |
|
Mark Rutland
|
bff705950e
arm64: remove unnecessary cache flush at boot
|
12 anni fa |
|
Catalin Marinas
|
7363590d2c
arm64: Implement coherent DMA API based on swiotlb
|
12 anni fa |
 Jingoo Han
|
03324e6e6e
arm64: mm: fix the function name in comment of __flush_dcache_area
|
11 anni fa |
 Sukanto Ghosh
|
b4fed07968
arm64: mm: Fix operands of clz in __flush_dcache_all
|
12 anni fa |
|
Catalin Marinas
|
f1a0c4aa09
arm64: Cache maintenance routines
|
13 anni fa |
