Commit History

Autor SHA1 Mensaxe Data
  Markos Chandras 3885c2b463 MIPS: CM: Add support for reporting CM cache errors %!s(int64=10) %!d(string=hai) anos
  Markos Chandras 038b0f536e MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels. %!s(int64=10) %!d(string=hai) anos
  Markos Chandras c0b584a269 MIPS: mips-cm: Extend CM accessors for 64-bit CPUs %!s(int64=10) %!d(string=hai) anos
  Markos Chandras c014d164f2 MIPS: Add platform callback before initializing the L2 cache %!s(int64=10) %!d(string=hai) anos
  Ralf Baechle 15d45cce3a MIPS: Replace use of phys_t with phys_addr_t. %!s(int64=10) %!d(string=hai) anos
  Paul Burton 9f98f3dd0c MIPS: Add generic CM probe & access code %!s(int64=11) %!d(string=hai) anos