 Andi Kleen
|
a7b58d211b
perf/x86/intel/lbr: Allow time stamp for free running PEBSv3
|
10 years ago |
 Kan Liang
|
ae3f011fc2
perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask
|
10 years ago |
 Linus Torvalds
|
23b7776290
Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
|
10 years ago |
|
Linus Torvalds
|
6bc4c3ad36
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
|
10 years ago |
 Palik, Imre
|
2c33645d36
perf/x86: Honor the architectural performance monitoring version
|
10 years ago |
|
Andi Kleen
|
4b36f1a413
perf/x86: Add more Broadwell model numbers
|
10 years ago |
 Yan, Zheng
|
9c964efa43
perf/x86/intel: Drain the PEBS buffer during context switches
|
10 years ago |
|
Yan, Zheng
|
3569c0d7c5
perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold)
|
10 years ago |
|
Yan, Zheng
|
851559e35f
perf/x86/intel: Use the PEBS auto reload mechanism when possible
|
10 years ago |
 Bartosz Golaszewski
|
06931e6224
sched/topology: Rename topology_thread_cpumask() to topology_sibling_cpumask()
|
10 years ago |
 Peter Zijlstra
|
ba040653b4
perf/x86/intel: Simplify put_exclusive_constraints()
|
10 years ago |
|
Peter Zijlstra
|
43ef205bde
perf/x86/intel: Remove intel_excl_states::init_state
|
10 years ago |
|
Peter Zijlstra
|
1fe684e349
perf/x86/intel: Remove pointless tests
|
10 years ago |
|
Peter Zijlstra
|
0c41e756b9
perf/x86/intel: Clean up intel_commit_scheduling() placement
|
10 years ago |
|
Peter Zijlstra
|
17186ccda3
perf/x86/intel: Make WARN()ings consistent
|
10 years ago |
|
Peter Zijlstra
|
aaf932e816
perf/x86/intel: Simplify the dynamic constraint code somewhat
|
10 years ago |
|
Peter Zijlstra
|
b32ed7f5de
perf/x86/intel: Add lockdep assert
|
10 years ago |
|
Peter Zijlstra
|
1c565833ac
perf/x86/intel: Correct local vs remote sibling state
|
10 years ago |
|
Peter Zijlstra
|
cc1790cf54
perf/x86: Improve HT workaround GP counter constraint
|
10 years ago |
|
Peter Zijlstra
|
b371b59431
perf/x86: Fix event/group validation
|
10 years ago |
|
Kan Liang
|
6d37405635
perf/x86/intel: Fix SLM cache event list
|
10 years ago |
 Jiri Olsa
|
3b6e042188
perf/x86/intel: Add cpu_(prepare|starting|dying) for core_pmu
|
10 years ago |
|
Kan Liang
|
78d504bcd7
perf/x86/intel: Add Broadwell support for the LBR callstack
|
10 years ago |
|
Andi Kleen
|
1a78d93750
perf/x86/intel: Streamline LBR MSR handling in PMI
|
10 years ago |
|
Andi Kleen
|
8882edf735
perf/x86/intel: Reset more state in PMU reset
|
10 years ago |
 Stephane Eranian
|
b37609c30e
perf/x86/intel: Make the HT bug workaround conditional on HT enabled
|
10 years ago |
|
Stephane Eranian
|
c02cdbf60b
perf/x86/intel: Limit to half counters when the HT workaround is enabled, to avoid exclusive mode starvation
|
10 years ago |
|
Stephane Eranian
|
a90738c2cb
perf/x86/intel: Fix intel_get_event_constraints() for dynamic constraints
|
10 years ago |
 Maria Dimakopoulou
|
93fcf72cc0
perf/x86/intel: Enforce HT bug workaround for SNB/IVB/HSW
|
10 years ago |
|
Maria Dimakopoulou
|
e979121b1b
perf/x86/intel: Implement cross-HT corruption bug workaround
|
10 years ago |
