 Ville Syrjälä
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580d8ed522
drm/i915: Give encoders useful names
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9 years ago |
 Ander Conselvan de Oliveira
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9e2c84751e
drm/i915: Remove intel_clock_t typedef
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9 years ago |
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Ville Syrjälä
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b2ccb822d3
drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as needed
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9 years ago |
 Lyude
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5a8f97ea04
Revert "drm/i915: start adding dp mst audio"
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9 years ago |
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Ander Conselvan de Oliveira
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d4d6279abe
drm/i915: Set crtc_state->lane_count for HDMI
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9 years ago |
 Imre Deak
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47baf2a533
drm/i915/bxt: Force reprogramming a PHY with invalid HW state
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9 years ago |
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Imre Deak
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01a01ef2ea
drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabled
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9 years ago |
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Imre Deak
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67856d4d3c
drm/i915/bxt: Use PHY0 GRC value for HW state verification
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9 years ago |
 Mika Kahola
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0098351921
drm/i915: Fix eDP low vswing for Broadwell
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9 years ago |
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Imre Deak
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bf93ba67e9
drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume
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9 years ago |
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Imre Deak
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adc7f04bfd
drm/i915/bxt: Add HW state verification for DDI PHY and CDCLK
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9 years ago |
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Imre Deak
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bd48006178
drm/i915/bxt: Don't reprogram an already enabled DDI PHY
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9 years ago |
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Imre Deak
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d7d33fd85a
drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninit
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9 years ago |
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Imre Deak
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c6c4696fa5
drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpers
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9 years ago |
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Imre Deak
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28ca6931f0
drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-only
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9 years ago |
 Chris Wilson
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183aec1644
drm/i915/ddi: Silence compiler warning for unknown output type
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9 years ago |
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Ville Syrjälä
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5b421c57e0
drm/i915: Disable FDI RX before DDI_BUF_CTL
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9 years ago |
 Jani Nikula
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11b538cd6d
drm/i915: use for_each_port_masked in bxt phy init for clarity
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9 years ago |
 Vandana Kannan
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b61e79967a
drm/i915: BXT DDI PHY sequence BUN
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9 years ago |
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Jani Nikula
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06411f08b3
drm/i915: move edp low vswing config to vbt data
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9 years ago |
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Jani Nikula
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6aa23e658d
drm/i915: use a substruct in vbt data for edp
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9 years ago |
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Jani Nikula
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4d1de97568
drm/i915/bxt: add dsi transcoders
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9 years ago |
|
Ander Conselvan de Oliveira
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a3c988ea06
drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code
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9 years ago |
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Ander Conselvan de Oliveira
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9d16da65bf
drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface
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9 years ago |
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Ander Conselvan de Oliveira
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34177c249a
drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.c
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9 years ago |
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Ander Conselvan de Oliveira
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304b65cbdc
drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c
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9 years ago |
|
Ander Conselvan de Oliveira
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daedf20a4f
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
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9 years ago |
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Ander Conselvan de Oliveira
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8106ddbd77
drm/i915: Store a direct pointer to shared dpll in intel_crtc_state
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9 years ago |
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Ander Conselvan de Oliveira
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55be2f0854
drm/i915: Move ddi shared dpll code to intel_dpll_mgr.c
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9 years ago |
 Takashi Iwai
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9dfbffcf4a
drm/i915: Fix bogus dig_port_map[] assignment for pre-HSW
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9 years ago |
