 Stephen Boyd
|
bd41aa6773
clk: bcm: Remove CLK_IS_ROOT
|
9 years ago |
 Martin Sperl
|
2103a21561
clk: bcm2835: added missing clock register definitions
|
9 years ago |
 Eric Anholt
|
79c1e2fc2c
clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()
|
9 years ago |
|
Eric Anholt
|
773b3966dd
clk: bcm2835: Fix setting of PLL divider clock rates
|
9 years ago |
 Remi Pommarel
|
cfbab8fbab
clk: bcm2835: Add PWM clock support
|
9 years ago |
|
Remi Pommarel
|
6d18b8adbe
clk: bcm2835: Support for clock parent selection
|
9 years ago |
|
Remi Pommarel
|
9c95b32ca0
clk: bcm2835: add a round up ability to the clock divisor
|
9 years ago |
|
Eric Anholt
|
41691b8862
clk: bcm2835: Add support for programming the audio domain clocks
|
10 years ago |
|
Eric Anholt
|
4f61d8e220
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
|
10 years ago |
