 Heiner Kallweit
|
feeef096a7
mmc: use new core function mmc_get_dma_dir
|
8 years ago |
 Icenowy Zheng
|
bd675698e8
mmc: sunxi: change controller error info to debug level
|
8 years ago |
 Maxime Ripard
|
43c15e962c
mmc: sunxi: Add more debug informations
|
8 years ago |
|
Maxime Ripard
|
4fb3ce07ea
mmc: sunxi: Add EMMC (MMC2) controller compatible
|
8 years ago |
|
Maxime Ripard
|
16e821e3ba
mmc: sunxi: Mask DATA0 when updating the clock
|
8 years ago |
|
Maxime Ripard
|
9a37e53e45
mmc: sunxi: Enable the new timings for the A64 MMC controllers
|
8 years ago |
|
Maxime Ripard
|
860fdf89b9
mmc: sunxi: Always set signal delay to 0 for A64
|
8 years ago |
|
Maxime Ripard
|
9479074e93
mmc: sunxi: Gate the clock when rate is 0
|
8 years ago |
|
Maxime Ripard
|
39cc281fb7
mmc: sunxi: Fix clock frequency change sequence
|
8 years ago |
|
Maxime Ripard
|
424feb59d8
mmc: sunxi: Prevent against null dereference for vmmc
|
9 years ago |
|
Icenowy Zheng
|
e1b8dfd1b1
mmc: sunxi: add support for A64 mmc controller
|
9 years ago |
 Michael Weiser
|
2dd110b27d
mmc: sunxi-mmc: change idma descriptor to __le32
|
9 years ago |
 Jean-Francois Moine
|
63311bece0
mmc: sunxi: Check the value returned by clk_round_rate
|
9 years ago |
 Hans de Goede
|
b465646ef4
mmc: sunxi: sun4i / sun5i do not have sample clocks
|
9 years ago |
|
Hans de Goede
|
f2cecb7094
mmc: sunxi: Factor out clock phase setting code into a helper function
|
9 years ago |
|
Hans de Goede
|
86a93317ed
mmc: sunxi: Introduce a sunxi_mmc_cfg struct
|
9 years ago |
|
Hans de Goede
|
4c5f4bf412
mmc: sunxi: Disable sample clks on remove
|
9 years ago |
 Chen-Yu Tsai
|
afefc102df
mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80
|
9 years ago |
|
Chen-Yu Tsai
|
0175249efa
mmc: sunxi: Fix DDR MMC timings for A80
|
9 years ago |
|
Chen-Yu Tsai
|
2963070a0f
mmc: sunxi: Disable eMMC HS-DDR (MMC_CAP_1_8V_DDR) for Allwinner A80
|
9 years ago |
 Jaehoon Chung
|
f2c90c389e
mmc: sunxi-mmc: remove the MMC_DATA_STREAM flag
|
9 years ago |
|
Chen-Yu Tsai
|
aed26fcafe
mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support
|
9 years ago |
|
Chen-Yu Tsai
|
2a7aa63a27
mmc: sunxi: Support 8 bit eMMC DDR transfer modes
|
9 years ago |
|
Chen-Yu Tsai
|
2dcb305a9e
mmc: sunxi: Support MMC_DDR52 timing modes
|
9 years ago |
|
Chen-Yu Tsai
|
f771f6e832
mmc: sunxi: Support vqmmc regulator
|
9 years ago |
|
Chen-Yu Tsai
|
4159215ac9
mmc: sunxi: Return error on mmc_regulator_set_ocr() fail in .set_ios op
|
9 years ago |
|
Chen-Yu Tsai
|
0314cbd438
mmc: sunxi: Document host init sequence
|
9 years ago |
|
Hans de Goede
|
c1590dd86d
mmc: sunxi: Add card busy detection
|
10 years ago |
|
Hans de Goede
|
51424b2860
mmc: sunxi: Fix clk-delay settings
|
10 years ago |
 Michal Suchanek
|
7bb9c24435
mmc: sunxi: fix timeout in sunxi_mmc_oclk_onoff
|
10 years ago |
