 Imre Deak
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17b0c1f786
drm/i915: vlv: reserve GT power context early
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11 years ago |
 Daniel Vetter
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0d9d349d87
Merge commit origin/master into drm-intel-next
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11 years ago |
 Ville Syrjälä
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3f2dc5ac05
drm/i915: Fix 915GM self-refresh enable/disable
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11 years ago |
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Daniel Vetter
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feb56b9344
drm/i915: i830M has watermarks like i855
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11 years ago |
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Daniel Vetter
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3a77c4c441
drm/i915: Drop I915_ prefix from HAS_FBC
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11 years ago |
 Jesse Barnes
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576b259e65
drm/i915: use crtc_htotal when calculating ilk watermarks
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11 years ago |
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Ville Syrjälä
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bd60254471
drm/i915: Simplify watermark/init_clock_gating setup
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11 years ago |
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Ville Syrjälä
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03dce88129
drm/i915: Enable watermarks for BDW
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11 years ago |
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Ville Syrjälä
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a42a57196a
drm/i915: Fix watermark code for BDW
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11 years ago |
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Imre Deak
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820c198035
drm/i915: s/haswell_update_wm/ilk_update_wm/
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11 years ago |
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Imre Deak
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954911ebb1
drm/i915: simplify platform specific code in hsw_write_wm_values
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11 years ago |
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Ville Syrjälä
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8553c18ea6
drm/i915: Try to fix the messy IVB sprite scaling workaround
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11 years ago |
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Ville Syrjälä
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96f90c5421
drm/i915: Move ILK/SNB/IVB over to the HSW WM code
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11 years ago |
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Ville Syrjälä
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017636cc09
drm/i915: Disable LP1+ watermarks safely in init
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11 years ago |
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Ville Syrjälä
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ce0e0713a6
drm/i915: Linetime watermarks are a HSW feature
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11 years ago |
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Ville Syrjälä
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6c8b6c2887
drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled
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11 years ago |
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Ville Syrjälä
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0ba22e26fe
drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled
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11 years ago |
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Ville Syrjälä
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facd619b88
drm/i915: Fix LP1+ watermark disabling ILK
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11 years ago |
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Ville Syrjälä
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6cef2b8a56
drm/i915: Fix LP1 sprite watermarks for ILK/SNB
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11 years ago |
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Ville Syrjälä
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7b39a0b791
drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled
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11 years ago |
|
Ville Syrjälä
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a68d68eebc
drm/i915: Add ILK/SNB/IVB WM latency field support
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11 years ago |
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Ville Syrjälä
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ac9545fda6
drm/i915: Add IVB DDB partitioning control
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11 years ago |
 Damien Lespiau
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691bb71754
drm/i915: Use IS_VALLEYVIEW() to test the is_valleyview flag
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11 years ago |
 Paulo Zanoni
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be3d26b058
drm/i915: get a PC8 reference when enabling the power well
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11 years ago |
 Ben Widawsky
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ab57fff130
drm/i915/bdw: Implement ff workarounds
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11 years ago |
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Ben Widawsky
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63801f211c
drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent
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11 years ago |
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Ville Syrjälä
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993495ae99
drm/i915: Rework the FBC interval/stall stuff a bit
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11 years ago |
|
Ville Syrjälä
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159f98750e
drm/i915: FBC_CONTROL2 is gen4 only
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11 years ago |
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Ville Syrjälä
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42a430f51c
drm/i915: Gen2 FBC1 CFB pitch wants 32B units
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11 years ago |
|
Paulo Zanoni
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f9dcb0dfee
drm/i915: touch VGA MSR after we enable the power well
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11 years ago |
