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@@ -1548,7 +1548,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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if (IS_I945G(dev) || IS_I945GM(dev))
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I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | 0);
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else if (IS_I915GM(dev))
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- I915_WRITE(INSTPM, I915_READ(INSTPM) & ~INSTPM_SELF_EN);
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+ I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_SELF_EN));
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/* Calc sr entries for one plane configs */
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if (HAS_FW_BLC(dev) && enabled) {
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@@ -1600,7 +1600,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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I915_WRITE(FW_BLC_SELF,
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FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN);
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else if (IS_I915GM(dev))
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- I915_WRITE(INSTPM, I915_READ(INSTPM) | INSTPM_SELF_EN);
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+ I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_SELF_EN));
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DRM_DEBUG_KMS("memory self refresh enabled\n");
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} else
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DRM_DEBUG_KMS("memory self refresh disabled\n");
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