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+Applied Micro X-Gene SoC DMA nodes
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+
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+DMA nodes are defined to describe on-chip DMA interfaces in
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+APM X-Gene SoC.
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+
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+Required properties for DMA interfaces:
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+- compatible: Should be "apm,xgene-dma".
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+- device_type: set to "dma".
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+- reg: Address and length of the register set for the device.
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+ It contains the information of registers in the following order:
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+ 1st - DMA control and status register address space.
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+ 2nd - Descriptor ring control and status register address space.
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+ 3rd - Descriptor ring command register address space.
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+ 4th - Soc efuse register address space.
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+- interrupts: DMA has 5 interrupts sources. 1st interrupt is
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+ DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
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+ are completion interrupts for each DMA channels.
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+- clocks: Reference to the clock entry.
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+
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+Optional properties:
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+- dma-coherent : Present if dma operations are coherent
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+
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+Example:
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+ dmaclk: dmaclk@1f27c000 {
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+ compatible = "apm,xgene-device-clock";
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+ #clock-cells = <1>;
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+ clocks = <&socplldiv2 0>;
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+ reg = <0x0 0x1f27c000 0x0 0x1000>;
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+ reg-names = "csr-reg";
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+ clock-output-names = "dmaclk";
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+ };
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+
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+ dma: dma@1f270000 {
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+ compatible = "apm,xgene-storm-dma";
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+ device_type = "dma";
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+ reg = <0x0 0x1f270000 0x0 0x10000>,
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+ <0x0 0x1f200000 0x0 0x10000>,
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+ <0x0 0x1b008000 0x0 0x2000>,
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+ <0x0 0x1054a000 0x0 0x100>;
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+ interrupts = <0x0 0x82 0x4>,
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+ <0x0 0xb8 0x4>,
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+ <0x0 0xb9 0x4>,
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+ <0x0 0xba 0x4>,
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+ <0x0 0xbb 0x4>;
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+ dma-coherent;
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+ clocks = <&dmaclk 0>;
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+ };
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