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@@ -68,3 +68,48 @@ void pci_ptm_init(struct pci_dev *dev)
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pci_ptm_info(dev);
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}
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+
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+int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
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+{
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+ int pos;
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+ u32 cap, ctrl;
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+ struct pci_dev *ups;
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+
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+ if (!pci_is_pcie(dev))
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+ return -EINVAL;
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+
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+ pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
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+ if (!pos)
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+ return -EINVAL;
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+
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+ pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
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+ if (!(cap & PCI_PTM_CAP_REQ))
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+ return -EINVAL;
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+
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+ /*
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+ * For a PCIe Endpoint, PTM is only useful if the endpoint can
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+ * issue PTM requests to upstream devices that have PTM enabled.
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+ *
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+ * For Root Complex Integrated Endpoints, there is no upstream
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+ * device, so there must be some implementation-specific way to
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+ * associate the endpoint with a time source.
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+ */
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+ if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT) {
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+ ups = pci_upstream_bridge(dev);
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+ if (!ups || !ups->ptm_enabled)
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+ return -EINVAL;
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+ } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
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+ } else
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+ return -EINVAL;
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+
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+ ctrl = PCI_PTM_CTRL_ENABLE;
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+ pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);
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+ dev->ptm_enabled = 1;
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+
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+ pci_ptm_info(dev);
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+
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+ if (granularity)
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+ *granularity = 0;
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+ return 0;
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+}
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+EXPORT_SYMBOL(pci_enable_ptm);
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