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@@ -2257,17 +2257,37 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder,
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}
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}
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+static void intel_disable_ddi_buf(struct intel_encoder *encoder)
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+{
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+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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+ enum port port = intel_ddi_get_encoder_port(encoder);
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+ bool wait = false;
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+ u32 val;
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+
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+ val = I915_READ(DDI_BUF_CTL(port));
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+ if (val & DDI_BUF_CTL_ENABLE) {
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+ val &= ~DDI_BUF_CTL_ENABLE;
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+ I915_WRITE(DDI_BUF_CTL(port), val);
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+ wait = true;
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+ }
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+
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+ val = I915_READ(DP_TP_CTL(port));
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+ val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);
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+ val |= DP_TP_CTL_LINK_TRAIN_PAT1;
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+ I915_WRITE(DP_TP_CTL(port), val);
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+
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+ if (wait)
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+ intel_wait_ddi_buf_idle(dev_priv, port);
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+}
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+
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static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state)
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{
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struct drm_encoder *encoder = &intel_encoder->base;
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struct drm_i915_private *dev_priv = to_i915(encoder->dev);
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- enum port port = intel_ddi_get_encoder_port(intel_encoder);
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struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
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int type = intel_encoder->type;
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- uint32_t val;
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- bool wait = false;
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if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
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/*
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@@ -2286,20 +2306,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
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intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
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}
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- val = I915_READ(DDI_BUF_CTL(port));
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- if (val & DDI_BUF_CTL_ENABLE) {
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- val &= ~DDI_BUF_CTL_ENABLE;
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- I915_WRITE(DDI_BUF_CTL(port), val);
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- wait = true;
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- }
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-
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- val = I915_READ(DP_TP_CTL(port));
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- val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);
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- val |= DP_TP_CTL_LINK_TRAIN_PAT1;
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- I915_WRITE(DP_TP_CTL(port), val);
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-
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- if (wait)
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- intel_wait_ddi_buf_idle(dev_priv, port);
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+ intel_disable_ddi_buf(intel_encoder);
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if (type == INTEL_OUTPUT_HDMI) {
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dig_port->set_infoframes(encoder, false,
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