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@@ -23,28 +23,23 @@ MMUs.
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for window 1, 2 and 3.
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* M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
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the other System MMU on the write channel.
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-The drivers must consider how to handle those System MMUs. One of the idea is
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-to implement child devices or sub-devices which are the client devices of the
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-System MMU.
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-Note:
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-The current DT binding for the Exynos System MMU is incomplete.
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-The following properties can be removed or changed, if found incompatible with
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-the "Generic IOMMU Binding" support for attaching devices to the IOMMU.
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+For information on assigning System MMU controller to its peripheral devices,
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+see generic IOMMU bindings.
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Required properties:
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- compatible: Should be "samsung,exynos-sysmmu"
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- reg: A tuple of base address and size of System MMU registers.
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+- #iommu-cells: Should be <0>.
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- interrupt-parent: The phandle of the interrupt controller of System MMU
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- interrupts: An interrupt specifier for interrupt signal of System MMU,
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according to the format defined by a particular interrupt
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controller.
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- clock-names: Should be "sysmmu" if the System MMU is needed to gate its clock.
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Optional "master" if the clock to the System MMU is gated by
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- another gate clock other than "sysmmu".
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- Exynos4 SoCs, there needs no "master" clock.
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- Exynos5 SoCs, some System MMUs must have "master" clocks.
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-- clocks: Required if the System MMU is needed to gate its clock.
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+ another gate clock other than "sysmmu" (usually main gate clock
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+ of peripheral device this SYSMMU belongs to).
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+- clocks: Phandles for respective clocks described by clock-names.
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- power-domains: Required if the System MMU is needed to gate its power.
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Please refer to the following document:
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Documentation/devicetree/bindings/power/pd-samsung.txt
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@@ -57,6 +52,7 @@ Examples:
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power-domains = <&pd_gsc>;
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clocks = <&clock CLK_GSCL0>;
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clock-names = "gscl";
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+ iommus = <&sysmmu_gsc0>;
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};
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sysmmu_gsc0: sysmmu@13E80000 {
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@@ -67,4 +63,5 @@ Examples:
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clock-names = "sysmmu", "master";
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clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
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power-domains = <&pd_gsc>;
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+ #iommu-cells = <0>;
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};
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