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iommu/exynos: Update device tree documentation

Exynos SYSMMU bindings documentation was merged before generic IOMMU
binding have been introduced. This patch updates documentation to match
current state.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Marek Szyprowski 9 年之前
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共有 1 個文件被更改,包括 8 次插入11 次删除
  1. 8 11
      Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt

+ 8 - 11
Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt

@@ -23,28 +23,23 @@ MMUs.
   for window 1, 2 and 3.
   for window 1, 2 and 3.
 * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
 * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
   the other System MMU on the write channel.
   the other System MMU on the write channel.
-The drivers must consider how to handle those System MMUs. One of the idea is
-to implement child devices or sub-devices which are the client devices of the
-System MMU.
 
 
-Note:
-The current DT binding for the Exynos System MMU is incomplete.
-The following properties can be removed or changed, if found incompatible with
-the "Generic IOMMU Binding" support for attaching devices to the IOMMU.
+For information on assigning System MMU controller to its peripheral devices,
+see generic IOMMU bindings.
 
 
 Required properties:
 Required properties:
 - compatible: Should be "samsung,exynos-sysmmu"
 - compatible: Should be "samsung,exynos-sysmmu"
 - reg: A tuple of base address and size of System MMU registers.
 - reg: A tuple of base address and size of System MMU registers.
+- #iommu-cells: Should be <0>.
 - interrupt-parent: The phandle of the interrupt controller of System MMU
 - interrupt-parent: The phandle of the interrupt controller of System MMU
 - interrupts: An interrupt specifier for interrupt signal of System MMU,
 - interrupts: An interrupt specifier for interrupt signal of System MMU,
 	      according to the format defined by a particular interrupt
 	      according to the format defined by a particular interrupt
 	      controller.
 	      controller.
 - clock-names: Should be "sysmmu" if the System MMU is needed to gate its clock.
 - clock-names: Should be "sysmmu" if the System MMU is needed to gate its clock.
 	       Optional "master" if the clock to the System MMU is gated by
 	       Optional "master" if the clock to the System MMU is gated by
-	       another gate clock other than "sysmmu".
-	       Exynos4 SoCs, there needs no "master" clock.
-	       Exynos5 SoCs, some System MMUs must have "master" clocks.
-- clocks: Required if the System MMU is needed to gate its clock.
+	       another gate clock other than "sysmmu" (usually main gate clock
+	       of peripheral device this SYSMMU belongs to).
+- clocks: Phandles for respective clocks described by clock-names.
 - power-domains: Required if the System MMU is needed to gate its power.
 - power-domains: Required if the System MMU is needed to gate its power.
 	  Please refer to the following document:
 	  Please refer to the following document:
 	  Documentation/devicetree/bindings/power/pd-samsung.txt
 	  Documentation/devicetree/bindings/power/pd-samsung.txt
@@ -57,6 +52,7 @@ Examples:
 		power-domains = <&pd_gsc>;
 		power-domains = <&pd_gsc>;
 		clocks = <&clock CLK_GSCL0>;
 		clocks = <&clock CLK_GSCL0>;
 		clock-names = "gscl";
 		clock-names = "gscl";
+		iommus = <&sysmmu_gsc0>;
 	};
 	};
 
 
 	sysmmu_gsc0: sysmmu@13E80000 {
 	sysmmu_gsc0: sysmmu@13E80000 {
@@ -67,4 +63,5 @@ Examples:
 		clock-names = "sysmmu", "master";
 		clock-names = "sysmmu", "master";
 		clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
 		clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
 		power-domains = <&pd_gsc>;
 		power-domains = <&pd_gsc>;
+		#iommu-cells = <0>;
 	};
 	};