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@@ -309,6 +309,12 @@ enum ath9k_hw_hang_checks {
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HW_MAC_HANG = BIT(5),
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};
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+#define AR_PCIE_PLL_PWRSAVE_CONTROL BIT(0)
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+#define AR_PCIE_PLL_PWRSAVE_ON_D3 BIT(1)
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+#define AR_PCIE_PLL_PWRSAVE_ON_D0 BIT(2)
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+#define AR_PCIE_CDR_PWRSAVE_ON_D3 BIT(3)
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+#define AR_PCIE_CDR_PWRSAVE_ON_D0 BIT(4)
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+
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struct ath9k_ops_config {
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int dma_beacon_response_time;
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int sw_beacon_response_time;
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