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@@ -308,6 +308,13 @@
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-output-names = "sd2";
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clock-output-names = "sd2";
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};
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};
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+ mmc0_clk: mmc0_clk@e6150240 {
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+ compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
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+ reg = <0 0xe6150240 0 4>;
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+ clocks = <&pll1_div2_clk>;
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+ #clock-cells = <0>;
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+ clock-output-names = "mmc0";
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+ };
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/* Fixed factor clocks */
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/* Fixed factor clocks */
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pll1_div2_clk: pll1_div2_clk {
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pll1_div2_clk: pll1_div2_clk {
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@@ -512,16 +519,16 @@
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
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reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
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clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
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clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
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- <&rclk_clk>, <&hp_clk>, <&hp_clk>;
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+ <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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clock-indices = <
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clock-indices = <
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R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
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R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
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- R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0
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- R8A7794_CLK_USBDMAC1
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+ R8A7794_CLK_MMCIF0 R8A7794_CLK_CMT1
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+ R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
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>;
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>;
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clock-output-names =
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clock-output-names =
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"sdhi2", "sdhi1", "sdhi0",
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"sdhi2", "sdhi1", "sdhi0",
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- "cmt1", "usbdmac0", "usbdmac1";
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+ "mmcif0", "cmt1", "usbdmac0", "usbdmac1";
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};
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};
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mstp7_clks: mstp7_clks@e615014c {
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mstp7_clks: mstp7_clks@e615014c {
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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