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@@ -33,6 +33,11 @@
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#include "i915_guc_reg.h"
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#include "i915_vma.h"
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+/*
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+ * Top level structure of GuC. It handles firmware loading and manages client
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+ * pool and doorbells. intel_guc owns a i915_guc_client to replace the legacy
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+ * ExecList submission.
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+ */
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struct intel_guc {
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struct intel_uc_fw fw;
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struct intel_guc_log log;
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@@ -83,6 +88,12 @@ static inline void intel_guc_notify(struct intel_guc *guc)
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guc->notify(guc);
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}
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+/*
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+ * GuC does not allow any gfx GGTT address that falls into range [0, WOPCM_TOP),
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+ * which is reserved for Boot ROM, SRAM and WOPCM. Currently this top address is
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+ * 512K. In order to exclude 0-512K address space from GGTT, all gfx objects
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+ * used by GuC is pinned with PIN_OFFSET_BIAS along with size of WOPCM.
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+ */
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static inline u32 guc_ggtt_offset(struct i915_vma *vma)
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{
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u32 offset = i915_ggtt_offset(vma);
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