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@@ -119,11 +119,10 @@ static u8 iwl_pcie_gen2_get_num_tbs(struct iwl_trans *trans,
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static void iwl_pcie_gen2_tfd_unmap(struct iwl_trans *trans,
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static void iwl_pcie_gen2_tfd_unmap(struct iwl_trans *trans,
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struct iwl_cmd_meta *meta,
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struct iwl_cmd_meta *meta,
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- struct iwl_txq *txq, int index)
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+ struct iwl_tfh_tfd *tfd)
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{
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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int i, num_tbs;
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int i, num_tbs;
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- struct iwl_tfh_tfd *tfd = iwl_pcie_get_tfd(trans_pcie, txq, index);
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/* Sanity check on number of chunks */
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/* Sanity check on number of chunks */
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num_tbs = iwl_pcie_gen2_get_num_tbs(trans, tfd);
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num_tbs = iwl_pcie_gen2_get_num_tbs(trans, tfd);
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@@ -152,6 +151,8 @@ static void iwl_pcie_gen2_tfd_unmap(struct iwl_trans *trans,
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static void iwl_pcie_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
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static void iwl_pcie_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
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{
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{
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+ struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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+
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/* rd_ptr is bounded by TFD_QUEUE_SIZE_MAX and
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/* rd_ptr is bounded by TFD_QUEUE_SIZE_MAX and
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* idx is bounded by n_window
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* idx is bounded by n_window
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*/
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*/
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@@ -163,7 +164,8 @@ static void iwl_pcie_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
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/* We have only q->n_window txq->entries, but we use
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/* We have only q->n_window txq->entries, but we use
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* TFD_QUEUE_SIZE_MAX tfds
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* TFD_QUEUE_SIZE_MAX tfds
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*/
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*/
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- iwl_pcie_gen2_tfd_unmap(trans, &txq->entries[idx].meta, txq, rd_ptr);
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+ iwl_pcie_gen2_tfd_unmap(trans, &txq->entries[idx].meta,
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+ iwl_pcie_get_tfd(trans_pcie, txq, rd_ptr));
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/* free SKB */
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/* free SKB */
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if (txq->entries) {
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if (txq->entries) {
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@@ -182,79 +184,89 @@ static void iwl_pcie_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
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}
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}
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}
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}
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-static inline void iwl_pcie_gen2_set_tb(struct iwl_trans *trans, void *tfd,
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- u8 idx, dma_addr_t addr, u16 len)
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-{
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- struct iwl_tfh_tfd *tfd_fh = (void *)tfd;
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- struct iwl_tfh_tb *tb = &tfd_fh->tbs[idx];
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-
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- put_unaligned_le64(addr, &tb->addr);
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- tb->tb_len = cpu_to_le16(len);
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-
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- tfd_fh->num_tbs = cpu_to_le16(idx + 1);
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-}
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-
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-int iwl_pcie_gen2_build_tfd(struct iwl_trans *trans, struct iwl_txq *txq,
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- dma_addr_t addr, u16 len, bool reset)
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+static int iwl_pcie_gen2_set_tb(struct iwl_trans *trans,
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+ struct iwl_tfh_tfd *tfd, dma_addr_t addr,
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+ u16 len)
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{
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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- void *tfd;
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- u32 num_tbs;
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-
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- tfd = txq->tfds + trans_pcie->tfd_size * txq->write_ptr;
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-
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- if (reset)
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- memset(tfd, 0, trans_pcie->tfd_size);
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-
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- num_tbs = iwl_pcie_gen2_get_num_tbs(trans, tfd);
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+ int idx = iwl_pcie_gen2_get_num_tbs(trans, tfd);
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+ struct iwl_tfh_tb *tb = &tfd->tbs[idx];
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/* Each TFD can point to a maximum max_tbs Tx buffers */
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/* Each TFD can point to a maximum max_tbs Tx buffers */
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- if (num_tbs >= trans_pcie->max_tbs) {
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+ if (tfd->num_tbs >= trans_pcie->max_tbs) {
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IWL_ERR(trans, "Error can not send more than %d chunks\n",
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IWL_ERR(trans, "Error can not send more than %d chunks\n",
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trans_pcie->max_tbs);
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trans_pcie->max_tbs);
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return -EINVAL;
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return -EINVAL;
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}
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}
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- if (WARN(addr & ~IWL_TX_DMA_MASK,
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- "Unaligned address = %llx\n", (unsigned long long)addr))
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- return -EINVAL;
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+ put_unaligned_le64(addr, &tb->addr);
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+ tb->tb_len = cpu_to_le16(len);
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- iwl_pcie_gen2_set_tb(trans, tfd, num_tbs, addr, len);
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+ tfd->num_tbs = cpu_to_le16(idx + 1);
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- return num_tbs;
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+ return idx;
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}
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}
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-static int iwl_fill_data_tbs(struct iwl_trans *trans, struct sk_buff *skb,
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- struct iwl_txq *txq, u8 hdr_len,
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- struct iwl_cmd_meta *out_meta,
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- struct iwl_device_cmd *dev_cmd, u16 tb1_len)
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+static
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+struct iwl_tfh_tfd *iwl_pcie_gen2_build_tfd(struct iwl_trans *trans,
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+ struct iwl_txq *txq,
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+ struct iwl_device_cmd *dev_cmd,
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+ struct sk_buff *skb,
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+ struct iwl_cmd_meta *out_meta)
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{
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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- u16 tb2_len;
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- int i;
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+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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+ struct iwl_tfh_tfd *tfd =
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+ iwl_pcie_get_tfd(trans_pcie, txq, txq->write_ptr);
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+ dma_addr_t tb_phys;
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+ int i, len, tb1_len, tb2_len, hdr_len;
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+ void *tb1_addr;
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+
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+ memset(tfd, 0, sizeof(*tfd));
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+
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+ tb_phys = iwl_pcie_get_first_tb_dma(txq, txq->write_ptr);
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+ /* The first TB points to bi-directional DMA data */
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+ memcpy(&txq->first_tb_bufs[txq->write_ptr], &dev_cmd->hdr,
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+ IWL_FIRST_TB_SIZE);
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+
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+ iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, IWL_FIRST_TB_SIZE);
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+
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+ /* there must be data left over for TB1 or this code must be changed */
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+ BUILD_BUG_ON(sizeof(struct iwl_tx_cmd_gen2) < IWL_FIRST_TB_SIZE);
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/*
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/*
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- * Set up TFD's third entry to point directly to remainder
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- * of skb's head, if any
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+ * The second TB (tb1) points to the remainder of the TX command
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+ * and the 802.11 header - dword aligned size
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+ * (This calculation modifies the TX command, so do it before the
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+ * setup of the first TB)
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*/
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*/
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+ len = sizeof(struct iwl_tx_cmd_gen2) + sizeof(struct iwl_cmd_header) +
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+ ieee80211_hdrlen(hdr->frame_control) - IWL_FIRST_TB_SIZE;
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+
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+ tb1_len = ALIGN(len, 4);
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+
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+ /* map the data for TB1 */
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+ tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_FIRST_TB_SIZE;
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+ tb_phys = dma_map_single(trans->dev, tb1_addr, tb1_len, DMA_TO_DEVICE);
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+ if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
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+ goto out_err;
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+ iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb1_len);
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+
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+ /* set up TFD's third entry to point to remainder of skb's head */
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+ hdr_len = ieee80211_hdrlen(hdr->frame_control);
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tb2_len = skb_headlen(skb) - hdr_len;
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tb2_len = skb_headlen(skb) - hdr_len;
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if (tb2_len > 0) {
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if (tb2_len > 0) {
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- dma_addr_t tb2_phys = dma_map_single(trans->dev,
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- skb->data + hdr_len,
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- tb2_len, DMA_TO_DEVICE);
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- if (unlikely(dma_mapping_error(trans->dev, tb2_phys))) {
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- iwl_pcie_gen2_tfd_unmap(trans, out_meta, txq,
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- txq->write_ptr);
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- return -EINVAL;
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- }
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- iwl_pcie_gen2_build_tfd(trans, txq, tb2_phys, tb2_len, false);
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+ tb_phys = dma_map_single(trans->dev, skb->data + hdr_len,
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+ tb2_len, DMA_TO_DEVICE);
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+ if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
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+ goto out_err;
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+ iwl_pcie_gen2_set_tb(trans, tfd, tb_phys, tb2_len);
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}
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}
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/* set up the remaining entries to point to the data */
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/* set up the remaining entries to point to the data */
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for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
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for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
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const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
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const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
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- dma_addr_t tb_phys;
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int tb_idx;
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int tb_idx;
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if (!skb_frag_size(frag))
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if (!skb_frag_size(frag))
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@@ -263,44 +275,35 @@ static int iwl_fill_data_tbs(struct iwl_trans *trans, struct sk_buff *skb,
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tb_phys = skb_frag_dma_map(trans->dev, frag, 0,
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tb_phys = skb_frag_dma_map(trans->dev, frag, 0,
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skb_frag_size(frag), DMA_TO_DEVICE);
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skb_frag_size(frag), DMA_TO_DEVICE);
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- if (unlikely(dma_mapping_error(trans->dev, tb_phys))) {
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- iwl_pcie_gen2_tfd_unmap(trans, out_meta, txq,
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- txq->write_ptr);
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- return -EINVAL;
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- }
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- tb_idx = iwl_pcie_gen2_build_tfd(trans, txq, tb_phys,
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- skb_frag_size(frag), false);
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+ if (unlikely(dma_mapping_error(trans->dev, tb_phys)))
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+ goto out_err;
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+ tb_idx = iwl_pcie_gen2_set_tb(trans, tfd, tb_phys,
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+ skb_frag_size(frag));
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out_meta->tbs |= BIT(tb_idx);
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out_meta->tbs |= BIT(tb_idx);
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}
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}
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- trace_iwlwifi_dev_tx(trans->dev, skb,
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- iwl_pcie_get_tfd(trans_pcie, txq, txq->write_ptr),
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- trans_pcie->tfd_size,
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- &dev_cmd->hdr, IWL_FIRST_TB_SIZE + tb1_len,
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+ trace_iwlwifi_dev_tx(trans->dev, skb, tfd, sizeof(*tfd), &dev_cmd->hdr,
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+ IWL_FIRST_TB_SIZE + tb1_len,
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skb->data + hdr_len, tb2_len);
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skb->data + hdr_len, tb2_len);
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- trace_iwlwifi_dev_tx_data(trans->dev, skb,
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- hdr_len, skb->len - hdr_len);
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- return 0;
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+ trace_iwlwifi_dev_tx_data(trans->dev, skb, hdr_len,
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+ skb->len - hdr_len);
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+
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+ return tfd;
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+
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+out_err:
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+ iwl_pcie_gen2_tfd_unmap(trans, out_meta, tfd);
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+ return NULL;
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}
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}
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int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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struct iwl_device_cmd *dev_cmd, int txq_id)
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struct iwl_device_cmd *dev_cmd, int txq_id)
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{
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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- struct ieee80211_hdr *hdr;
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struct iwl_tx_cmd_gen2 *tx_cmd = (void *)dev_cmd->payload;
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struct iwl_tx_cmd_gen2 *tx_cmd = (void *)dev_cmd->payload;
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struct iwl_cmd_meta *out_meta;
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struct iwl_cmd_meta *out_meta;
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- struct iwl_txq *txq;
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- dma_addr_t tb0_phys, tb1_phys, scratch_phys;
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- void *tb1_addr;
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+ struct iwl_txq *txq = &trans_pcie->txq[txq_id];
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void *tfd;
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void *tfd;
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- u16 len, tb1_len;
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- __le16 fc;
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- u8 hdr_len;
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- u16 wifi_seq;
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-
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- txq = &trans_pcie->txq[txq_id];
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if (WARN_ONCE(!test_bit(txq_id, trans_pcie->queue_used),
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if (WARN_ONCE(!test_bit(txq_id, trans_pcie->queue_used),
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"TX on unused queue %d\n", txq_id))
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"TX on unused queue %d\n", txq_id))
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@@ -311,26 +314,8 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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__skb_linearize(skb))
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__skb_linearize(skb))
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return -ENOMEM;
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return -ENOMEM;
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- /* mac80211 always puts the full header into the SKB's head,
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- * so there's no need to check if it's readable there
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- */
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- hdr = (struct ieee80211_hdr *)skb->data;
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- fc = hdr->frame_control;
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- hdr_len = ieee80211_hdrlen(fc);
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-
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spin_lock(&txq->lock);
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spin_lock(&txq->lock);
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- /* In AGG mode, the index in the ring must correspond to the WiFi
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- * sequence number. This is a HW requirements to help the SCD to parse
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- * the BA.
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- * Check here that the packets are in the right place on the ring.
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- */
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- wifi_seq = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
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- WARN_ONCE(txq->ampdu &&
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- (wifi_seq & 0xff) != txq->write_ptr,
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- "Q: %d WiFi Seq %d tfdNum %d",
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- txq_id, wifi_seq, txq->write_ptr);
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-
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/* Set up driver data for this TFD */
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/* Set up driver data for this TFD */
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txq->entries[txq->write_ptr].skb = skb;
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txq->entries[txq->write_ptr].skb = skb;
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txq->entries[txq->write_ptr].cmd = dev_cmd;
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txq->entries[txq->write_ptr].cmd = dev_cmd;
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@@ -339,49 +324,16 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
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cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
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INDEX_TO_SEQ(txq->write_ptr)));
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INDEX_TO_SEQ(txq->write_ptr)));
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- tb0_phys = iwl_pcie_get_first_tb_dma(txq, txq->write_ptr);
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- scratch_phys = tb0_phys + sizeof(struct iwl_cmd_header) +
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- offsetof(struct iwl_tx_cmd, scratch);
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-
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/* Set up first empty entry in queue's array of Tx/cmd buffers */
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/* Set up first empty entry in queue's array of Tx/cmd buffers */
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out_meta = &txq->entries[txq->write_ptr].meta;
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|
out_meta = &txq->entries[txq->write_ptr].meta;
|
|
out_meta->flags = 0;
|
|
out_meta->flags = 0;
|
|
|
|
|
|
- /*
|
|
|
|
- * The second TB (tb1) points to the remainder of the TX command
|
|
|
|
- * and the 802.11 header - dword aligned size
|
|
|
|
- * (This calculation modifies the TX command, so do it before the
|
|
|
|
- * setup of the first TB)
|
|
|
|
- */
|
|
|
|
- len = sizeof(struct iwl_tx_cmd) + sizeof(struct iwl_cmd_header) +
|
|
|
|
- hdr_len - IWL_FIRST_TB_SIZE;
|
|
|
|
- tb1_len = ALIGN(len, 4);
|
|
|
|
-
|
|
|
|
- /*
|
|
|
|
- * The first TB points to bi-directional DMA data, we'll
|
|
|
|
- * memcpy the data into it later.
|
|
|
|
- */
|
|
|
|
- iwl_pcie_gen2_build_tfd(trans, txq, tb0_phys, IWL_FIRST_TB_SIZE, true);
|
|
|
|
-
|
|
|
|
- /* there must be data left over for TB1 or this code must be changed */
|
|
|
|
- BUILD_BUG_ON(sizeof(struct iwl_tx_cmd) < IWL_FIRST_TB_SIZE);
|
|
|
|
-
|
|
|
|
- /* map the data for TB1 */
|
|
|
|
- tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_FIRST_TB_SIZE;
|
|
|
|
- tb1_phys = dma_map_single(trans->dev, tb1_addr, tb1_len, DMA_TO_DEVICE);
|
|
|
|
- if (unlikely(dma_mapping_error(trans->dev, tb1_phys)))
|
|
|
|
- goto out_err;
|
|
|
|
- iwl_pcie_gen2_build_tfd(trans, txq, tb1_phys, tb1_len, false);
|
|
|
|
-
|
|
|
|
- if (unlikely(iwl_fill_data_tbs(trans, skb, txq, hdr_len,
|
|
|
|
- out_meta, dev_cmd, tb1_len)))
|
|
|
|
- goto out_err;
|
|
|
|
-
|
|
|
|
- /* building the A-MSDU might have changed this data, so memcpy it now */
|
|
|
|
- memcpy(&txq->first_tb_bufs[txq->write_ptr], &dev_cmd->hdr,
|
|
|
|
- IWL_FIRST_TB_SIZE);
|
|
|
|
|
|
+ tfd = iwl_pcie_gen2_build_tfd(trans, txq, dev_cmd, skb, out_meta);
|
|
|
|
+ if (!tfd) {
|
|
|
|
+ spin_unlock(&txq->lock);
|
|
|
|
+ return -1;
|
|
|
|
+ }
|
|
|
|
|
|
- tfd = iwl_pcie_get_tfd(trans_pcie, txq, txq->write_ptr);
|
|
|
|
/* Set up entry for this TFD in Tx byte-count array */
|
|
/* Set up entry for this TFD in Tx byte-count array */
|
|
iwl_pcie_gen2_update_byte_tbl(trans, txq, le16_to_cpu(tx_cmd->len),
|
|
iwl_pcie_gen2_update_byte_tbl(trans, txq, le16_to_cpu(tx_cmd->len),
|
|
iwl_pcie_gen2_get_num_tbs(trans, tfd));
|
|
iwl_pcie_gen2_get_num_tbs(trans, tfd));
|
|
@@ -417,9 +369,6 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
|
|
*/
|
|
*/
|
|
spin_unlock(&txq->lock);
|
|
spin_unlock(&txq->lock);
|
|
return 0;
|
|
return 0;
|
|
-out_err:
|
|
|
|
- spin_unlock(&txq->lock);
|
|
|
|
- return -1;
|
|
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
/*
|