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@@ -284,14 +284,12 @@ static int iwl_fill_data_tbs(struct iwl_trans *trans, struct sk_buff *skb,
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return 0;
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}
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-#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(TX_CMD_FLG_MH_PAD)
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-
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int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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struct iwl_device_cmd *dev_cmd, int txq_id)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct ieee80211_hdr *hdr;
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- struct iwl_tx_cmd *tx_cmd = (struct iwl_tx_cmd *)dev_cmd->payload;
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+ struct iwl_tx_cmd_gen2 *tx_cmd = (void *)dev_cmd->payload;
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struct iwl_cmd_meta *out_meta;
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struct iwl_txq *txq;
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dma_addr_t tb0_phys, tb1_phys, scratch_phys;
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@@ -345,9 +343,6 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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scratch_phys = tb0_phys + sizeof(struct iwl_cmd_header) +
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offsetof(struct iwl_tx_cmd, scratch);
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- tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
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- tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
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-
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/* Set up first empty entry in queue's array of Tx/cmd buffers */
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out_meta = &txq->entries[txq->write_ptr].meta;
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out_meta->flags = 0;
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@@ -361,9 +356,6 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,
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len = sizeof(struct iwl_tx_cmd) + sizeof(struct iwl_cmd_header) +
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hdr_len - IWL_FIRST_TB_SIZE;
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tb1_len = ALIGN(len, 4);
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- /* Tell NIC about any 2-byte padding after MAC header */
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- if (tb1_len != len)
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- tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
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/*
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* The first TB points to bi-directional DMA data, we'll
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