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@@ -19,11 +19,37 @@
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/irqchip.h>
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+#include <linux/clk-provider.h>
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+#include <linux/clocksource.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "core.h"
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+#define RK3288_GRF_SOC_CON0 0x244
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+
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+static void __init rockchip_timer_init(void)
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+{
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+ if (of_machine_is_compatible("rockchip,rk3288")) {
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+ struct regmap *grf;
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+
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+ /*
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+ * Disable auto jtag/sdmmc switching that causes issues
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+ * with the mmc controllers making them unreliable
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+ */
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+ grf = syscon_regmap_lookup_by_compatible("rockchip,rk3288-grf");
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+ if (!IS_ERR(grf))
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+ regmap_write(grf, RK3288_GRF_SOC_CON0, 0x10000000);
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+ else
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+ pr_err("rockchip: could not get grf syscon\n");
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+ }
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+
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+ of_clk_init(NULL);
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+ clocksource_of_init();
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+}
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+
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static void __init rockchip_dt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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@@ -42,6 +68,7 @@ static const char * const rockchip_board_dt_compat[] = {
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DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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+ .init_time = rockchip_timer_init,
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.dt_compat = rockchip_board_dt_compat,
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.init_machine = rockchip_dt_init,
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MACHINE_END
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