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@@ -37,6 +37,8 @@ gt215_hdmi_ctrl(NV50_DISP_MTHD_V1)
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union {
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union {
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struct nv50_disp_sor_hdmi_pwr_v0 v0;
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struct nv50_disp_sor_hdmi_pwr_v0 v0;
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} *args = data;
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} *args = data;
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+ struct packed_hdmi_infoframe avi_infoframe;
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+ struct packed_hdmi_infoframe vendor_infoframe;
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u32 ctrl;
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u32 ctrl;
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int ret = -ENOSYS;
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int ret = -ENOSYS;
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@@ -62,8 +64,17 @@ gt215_hdmi_ctrl(NV50_DISP_MTHD_V1)
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+ args->v0.vendor_infoframe_length) < size)
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+ args->v0.vendor_infoframe_length) < size)
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return -E2BIG;
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return -E2BIG;
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+ pack_hdmi_infoframe(&avi_infoframe,
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+ data,
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+ args->v0.avi_infoframe_length);
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+
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+ pack_hdmi_infoframe(&vendor_infoframe,
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+ data + args->v0.avi_infoframe_length,
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+ args->v0.vendor_infoframe_length);
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+
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if (!(ctrl & 0x40000000)) {
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if (!(ctrl & 0x40000000)) {
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nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
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nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
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+ nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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return 0;
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return 0;
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@@ -71,12 +82,14 @@ gt215_hdmi_ctrl(NV50_DISP_MTHD_V1)
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/* AVI InfoFrame */
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/* AVI InfoFrame */
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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- nvkm_wr32(device, 0x61c528 + soff, 0x000d0282);
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- nvkm_wr32(device, 0x61c52c + soff, 0x0000006f);
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- nvkm_wr32(device, 0x61c530 + soff, 0x00000000);
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- nvkm_wr32(device, 0x61c534 + soff, 0x00000000);
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- nvkm_wr32(device, 0x61c538 + soff, 0x00000000);
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- nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
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+ if (args->v0.avi_infoframe_length) {
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+ nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header);
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+ nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low);
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+ nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high);
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+ nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low);
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+ nvkm_wr32(device, 0x61c538 + soff, avi_infoframe.subpack1_high);
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+ nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
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+ }
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/* Audio InfoFrame */
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/* Audio InfoFrame */
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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@@ -85,6 +98,18 @@ gt215_hdmi_ctrl(NV50_DISP_MTHD_V1)
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nvkm_wr32(device, 0x61c510 + soff, 0x00000000);
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nvkm_wr32(device, 0x61c510 + soff, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
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+ /* Vendor InfoFrame */
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+ nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
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+ if (args->v0.vendor_infoframe_length) {
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+ nvkm_wr32(device, 0x61c544 + soff, vendor_infoframe.header);
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+ nvkm_wr32(device, 0x61c548 + soff, vendor_infoframe.subpack0_low);
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+ nvkm_wr32(device, 0x61c54c + soff, vendor_infoframe.subpack0_high);
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+ /* Is there a second (or up to fourth?) set of subpack registers here? */
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+ /* nvkm_wr32(device, 0x61c550 + soff, vendor_infoframe.subpack1_low); */
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+ /* nvkm_wr32(device, 0x61c554 + soff, vendor_infoframe.subpack1_high); */
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+ nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001);
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+ }
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+
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nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
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nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
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nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
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nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
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nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
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nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
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