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@@ -1462,19 +1462,19 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
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(const struct gpu_info_firmware_v1_0 *)(fw->data +
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le32_to_cpu(hdr->header.ucode_array_offset_bytes));
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- adev->gfx.config.max_shader_engines = gpu_info_fw->gc_num_se;
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- adev->gfx.config.max_cu_per_sh = gpu_info_fw->gc_num_cu_per_sh;
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- adev->gfx.config.max_sh_per_se = gpu_info_fw->gc_num_sh_per_se;
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- adev->gfx.config.max_backends_per_se = gpu_info_fw->gc_num_rb_per_se;
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+ adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se);
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+ adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh);
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+ adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se);
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+ adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se);
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adev->gfx.config.max_texture_channel_caches =
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- gpu_info_fw->gc_num_tccs;
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- adev->gfx.config.max_gprs = gpu_info_fw->gc_num_gprs;
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- adev->gfx.config.max_gs_threads = gpu_info_fw->gc_num_max_gs_thds;
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- adev->gfx.config.gs_vgt_table_depth = gpu_info_fw->gc_gs_table_depth;
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- adev->gfx.config.gs_prim_buffer_depth = gpu_info_fw->gc_gsprim_buff_depth;
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+ le32_to_cpu(gpu_info_fw->gc_num_tccs);
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+ adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs);
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+ adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds);
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+ adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth);
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+ adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth);
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adev->gfx.config.double_offchip_lds_buf =
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- gpu_info_fw->gc_double_offchip_lds_buffer;
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- adev->gfx.cu_info.wave_front_size = gpu_info_fw->gc_wave_size;
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+ le32_to_cpu(gpu_info_fw->gc_double_offchip_lds_buffer);
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+ adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size);
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break;
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}
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default:
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