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@@ -139,27 +139,30 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
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/*
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* We should clear IMR at preinstall/uninstall, and just check at postinstall.
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*/
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-#define GEN5_ASSERT_IIR_IS_ZERO(reg) do { \
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- u32 val = I915_READ(reg); \
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- if (val) { \
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- WARN(1, "Interrupt register 0x%x is not zero: 0x%08x\n", \
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- (reg), val); \
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- I915_WRITE((reg), 0xffffffff); \
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- POSTING_READ(reg); \
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- I915_WRITE((reg), 0xffffffff); \
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- POSTING_READ(reg); \
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- } \
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-} while (0)
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+static void gen5_assert_iir_is_zero(struct drm_i915_private *dev_priv, u32 reg)
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+{
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+ u32 val = I915_READ(reg);
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+
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+ if (val == 0)
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+ return;
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+
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+ WARN(1, "Interrupt register 0x%x is not zero: 0x%08x\n",
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+ reg, val);
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+ I915_WRITE(reg, 0xffffffff);
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+ POSTING_READ(reg);
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+ I915_WRITE(reg, 0xffffffff);
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+ POSTING_READ(reg);
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+}
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#define GEN8_IRQ_INIT_NDX(type, which, imr_val, ier_val) do { \
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- GEN5_ASSERT_IIR_IS_ZERO(GEN8_##type##_IIR(which)); \
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+ gen5_assert_iir_is_zero(dev_priv, GEN8_##type##_IIR(which)); \
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I915_WRITE(GEN8_##type##_IER(which), (ier_val)); \
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I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \
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POSTING_READ(GEN8_##type##_IMR(which)); \
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} while (0)
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#define GEN5_IRQ_INIT(type, imr_val, ier_val) do { \
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- GEN5_ASSERT_IIR_IS_ZERO(type##IIR); \
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+ gen5_assert_iir_is_zero(dev_priv, type##IIR); \
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I915_WRITE(type##IER, (ier_val)); \
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I915_WRITE(type##IMR, (imr_val)); \
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POSTING_READ(type##IMR); \
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@@ -3365,7 +3368,7 @@ static void ibx_irq_postinstall(struct drm_device *dev)
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else
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mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
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- GEN5_ASSERT_IIR_IS_ZERO(SDEIIR);
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+ gen5_assert_iir_is_zero(dev_priv, SDEIIR);
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I915_WRITE(SDEIMR, ~mask);
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}
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