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@@ -805,17 +805,47 @@ static void __init sunxi_divider_clk_setup(struct device_node *node,
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void __iomem *reg;
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reg = of_iomap(node, 0);
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+ if (!reg) {
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+ pr_err("Could not map registers for mux-clk: %s\n",
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+ of_node_full_name(node));
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+ return;
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+ }
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clk_parent = of_clk_get_parent_name(node, 0);
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- of_property_read_string(node, "clock-output-names", &clk_name);
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+ if (of_property_read_string(node, "clock-output-names", &clk_name)) {
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+ pr_err("%s: could not read clock-output-names from \"%s\"\n",
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+ __func__, of_node_full_name(node));
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+ goto out_unmap;
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+ }
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clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0,
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reg, data->shift, data->width,
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data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0,
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data->table, &clk_lock);
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- if (clk)
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- of_clk_add_provider(node, of_clk_src_simple_get, clk);
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+ if (IS_ERR(clk)) {
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+ pr_err("%s: failed to register divider clock %s: %ld\n",
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+ __func__, clk_name, PTR_ERR(clk));
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+ goto out_unmap;
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+ }
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+
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+ if (of_clk_add_provider(node, of_clk_src_simple_get, clk)) {
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+ pr_err("%s: failed to add clock provider for %s\n",
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+ __func__, clk_name);
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+ goto out_unregister;
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+ }
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+
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+ if (clk_register_clkdev(clk, clk_name, NULL)) {
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+ of_clk_del_provider(node);
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+ goto out_unregister;
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+ }
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+
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+ return;
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+out_unregister:
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+ clk_unregister_divider(clk);
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+
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+out_unmap:
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+ iounmap(reg);
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}
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static void __init sun4i_ahb_clk_setup(struct device_node *node)
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