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@@ -674,11 +674,16 @@ static struct clk * __init sunxi_mux_clk_setup(struct device_node *node,
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int i;
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reg = of_iomap(node, 0);
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+ if (!reg) {
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+ pr_err("Could not map registers for mux-clk: %s\n",
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+ of_node_full_name(node));
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+ return NULL;
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+ }
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i = of_clk_parent_fill(node, parents, SUNXI_MAX_PARENTS);
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if (of_property_read_string(node, "clock-output-names", &clk_name)) {
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- pr_warn("%s: could not read clock-output-names for \"%s\"\n",
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- __func__, clk_name);
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+ pr_err("%s: could not read clock-output-names from \"%s\"\n",
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+ __func__, of_node_full_name(node));
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goto out_unmap;
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}
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@@ -688,15 +693,19 @@ static struct clk * __init sunxi_mux_clk_setup(struct device_node *node,
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0, &clk_lock);
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if (IS_ERR(clk)) {
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- pr_warn("%s: failed to register mux clock %s: %ld\n", __func__,
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- clk_name, PTR_ERR(clk));
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+ pr_err("%s: failed to register mux clock %s: %ld\n", __func__,
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+ clk_name, PTR_ERR(clk));
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goto out_unmap;
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}
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- of_clk_add_provider(node, of_clk_src_simple_get, clk);
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+ if (of_clk_add_provider(node, of_clk_src_simple_get, clk)) {
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+ pr_err("%s: failed to add clock provider for %s\n",
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+ __func__, clk_name);
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+ clk_unregister_divider(clk);
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+ goto out_unmap;
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+ }
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return clk;
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-
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out_unmap:
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iounmap(reg);
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return NULL;
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