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@@ -253,7 +253,7 @@ ENTRY(stext)
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* On return, the CPU will be ready for the MMU to be turned on and
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* the TCR will have been set.
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*/
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- ldr x27, __switch_data // address to jump to after
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+ ldr x27, =__mmap_switched // address to jump to after
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// MMU has been enabled
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adrp lr, __enable_mmu // return (PIC) address
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add lr, lr, #:lo12:__enable_mmu
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@@ -420,35 +420,22 @@ __create_page_tables:
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ENDPROC(__create_page_tables)
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.ltorg
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- .align 3
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- .type __switch_data, %object
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-__switch_data:
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- .quad __mmap_switched
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- .quad __bss_start // x6
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- .quad __bss_stop // x7
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- .quad __fdt_pointer // x5
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- .quad memstart_addr // x6
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- .quad init_thread_union + THREAD_START_SP // sp
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-
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/*
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- * The following fragment of code is executed with the MMU on in MMU mode, and
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- * uses absolute addresses; this is not position independent.
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+ * The following fragment of code is executed with the MMU enabled.
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*/
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+ .set initial_sp, init_thread_union + THREAD_START_SP
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__mmap_switched:
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- adr x3, __switch_data + 8
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+ adr_l x6, __bss_start
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+ adr_l x7, __bss_stop
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- ldp x6, x7, [x3], #16
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1: cmp x6, x7
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b.hs 2f
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str xzr, [x6], #8 // Clear BSS
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b 1b
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2:
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- ldr x5, [x3], #8
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- ldr x6, [x3], #8
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- ldr x16, [x3]
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- mov sp, x16
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- str x21, [x5] // Save FDT pointer
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- str x24, [x6] // Save PHYS_OFFSET
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+ adr_l sp, initial_sp, x4
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+ str_l x21, __fdt_pointer, x5 // Save FDT pointer
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+ str_l x24, memstart_addr, x6 // Save PHYS_OFFSET
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mov x29, #0
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b start_kernel
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ENDPROC(__mmap_switched)
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