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@@ -244,7 +244,6 @@ ENTRY(stext)
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bl el2_setup // Drop to EL1, w20=cpu_boot_mode
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bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET
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bl set_cpu_boot_mode_flag
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- mrs x22, midr_el1 // x22=cpuid
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bl __vet_fdt
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bl __create_page_tables // x25=TTBR0, x26=TTBR1
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@@ -427,7 +426,6 @@ __switch_data:
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.quad __mmap_switched
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.quad __bss_start // x6
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.quad __bss_stop // x7
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- .quad processor_id // x4
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.quad __fdt_pointer // x5
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.quad memstart_addr // x6
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.quad init_thread_union + THREAD_START_SP // sp
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@@ -445,11 +443,10 @@ __mmap_switched:
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str xzr, [x6], #8 // Clear BSS
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b 1b
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2:
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- ldp x4, x5, [x3], #16
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+ ldr x5, [x3], #8
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ldr x6, [x3], #8
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ldr x16, [x3]
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mov sp, x16
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- str x22, [x4] // Save processor ID
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str x21, [x5] // Save FDT pointer
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str x24, [x6] // Save PHYS_OFFSET
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mov x29, #0
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@@ -621,8 +618,6 @@ ENTRY(secondary_startup)
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/*
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* Common entry point for secondary CPUs.
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*/
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- mrs x22, midr_el1 // x22=cpuid
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-
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pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1
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bl __cpu_setup // initialise processor
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