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@@ -467,7 +467,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
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static int imx6_pcie_link_up(struct pcie_port *pp)
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{
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- u32 rc, debug_r0, rx_valid;
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+ u32 rc;
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int count = 5;
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/*
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@@ -501,21 +501,6 @@ static int imx6_pcie_link_up(struct pcie_port *pp)
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*/
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usleep_range(1000, 2000);
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}
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- /*
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- * From L0, initiate MAC entry to gen2 if EP/RC supports gen2.
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- * Wait 2ms (LTSSM timeout is 24ms, PHY lock is ~5us in gen2).
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- * If (MAC/LTSSM.state == Recovery.RcvrLock)
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- * && (PHY/rx_valid==0) then pulse PHY/rx_reset. Transition
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- * to gen2 is stuck
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- */
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- pcie_phy_read(pp->dbi_base, PCIE_PHY_RX_ASIC_OUT, &rx_valid);
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- debug_r0 = readl(pp->dbi_base + PCIE_PHY_DEBUG_R0);
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-
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- if (rx_valid & PCIE_PHY_RX_ASIC_OUT_VALID)
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- return 0;
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-
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- if ((debug_r0 & 0x3f) != 0x0d)
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- return 0;
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return 0;
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}
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