|
@@ -412,10 +412,8 @@ static void acp_dma_start(void __iomem *acp_mmio, u16 ch_num)
|
|
|
switch (ch_num) {
|
|
|
case ACP_TO_I2S_DMA_CH_NUM:
|
|
|
case ACP_TO_SYSRAM_CH_NUM:
|
|
|
- case I2S_TO_ACP_DMA_CH_NUM:
|
|
|
case ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM:
|
|
|
case ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM:
|
|
|
- case I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM:
|
|
|
dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
|
|
|
break;
|
|
|
default:
|
|
@@ -704,12 +702,6 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
|
|
|
acp_mmio, mmACP_EXTERNAL_INTR_STAT);
|
|
|
}
|
|
|
|
|
|
- if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
|
|
|
- valid_irq = true;
|
|
|
- acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
|
|
|
- acp_mmio, mmACP_EXTERNAL_INTR_STAT);
|
|
|
- }
|
|
|
-
|
|
|
if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) {
|
|
|
valid_irq = true;
|
|
|
snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream);
|
|
@@ -718,13 +710,6 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
|
|
|
acp_mmio, mmACP_EXTERNAL_INTR_STAT);
|
|
|
}
|
|
|
|
|
|
- if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) {
|
|
|
- valid_irq = true;
|
|
|
- acp_reg_write((intr_flag &
|
|
|
- BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16,
|
|
|
- acp_mmio, mmACP_EXTERNAL_INTR_STAT);
|
|
|
- }
|
|
|
-
|
|
|
if (valid_irq)
|
|
|
return IRQ_HANDLED;
|
|
|
else
|